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iCE40/abc
yosys-experimental
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Author
Age
Files
Lines
*
Making sure duplicated inverters are not created.
Alan Mishchenko
2018-04-11
1
-3
/
+9
*
Travis: build with namespaces enabled, and
Baruch Sterin
2018-04-02
1
-5
/
+22
*
Rename new flag to ABC_USE_STDINT_H
Robert Ou
2018-03-29
2
-7
/
+7
*
Add an option to use C99 stdint.h
Robert Ou
2018-03-26
2
-0
/
+56
*
Integrating SAT-based CEX minimization (bug fix).
Alan Mishchenko
2018-03-25
3
-11
/
+11
*
Integrating SAT-based CEX minimization.
Alan Mishchenko
2018-03-25
4
-10
/
+145
*
Adding new NPN code (compiler fix).
Alan Mishchenko
2018-03-25
1
-9
/
+9
*
Adding new NPN code (compiler fix).
Alan Mishchenko
2018-03-25
1
-1
/
+1
*
Adding new NPN code developed by XueGong Zhou at Fudan University.
Alan Mishchenko
2018-03-25
4
-144
/
+1098
*
Updating &mfs to support hard objects.
Alan Mishchenko
2018-03-23
2
-2
/
+55
*
Adding switch 'scorr -f' to dump inductive invariant as an AIG.
Alan Mishchenko
2018-03-22
6
-16
/
+36
*
Temporary bug fix for signal names in WLC (correction).
Alan Mishchenko
2018-03-21
1
-2
/
+5
*
Temporary bug fix for signal names in WLC.
Alan Mishchenko
2018-03-21
1
-0
/
+2
*
Bug fix in blasting with boxes.
Alan Mishchenko
2018-03-06
1
-1
/
+1
*
Extending primitives supported by WLC.
Alan Mishchenko
2018-03-03
3
-5
/
+85
*
Adding parameters and improvements to %blast.
Alan Mishchenko
2018-02-28
6
-1
/
+20
*
Adding parameters and improvements to %blast.
Alan Mishchenko
2018-02-28
12
-101
/
+307
*
Adding support for adders with carry-in in WLC and NDR.
Alan Mishchenko
2018-02-24
5
-5
/
+113
*
Bug fix in NDR handling.
Alan Mishchenko
2018-02-20
1
-6
/
+38
*
Merge two branches.
Alan Mishchenko
2018-02-20
1
-33
/
+81
|
\
|
*
Improvements to circuit based solver.
Alan Mishchenko
2018-02-20
1
-33
/
+81
*
|
Small fix in satoko.
Bruno Schmitt
2018-02-20
2
-3
/
+1
|
/
*
Compilation problem with pow().
Alan Mishchenko
2018-02-19
4
-7
/
+7
*
Improvements to circuit based solver.
Alan Mishchenko
2018-02-17
1
-193
/
+490
*
Extending MiniLUT to return attributes.
Alan Mishchenko
2018-02-11
2
-0
/
+20
*
Experiments with LUT mapping.
Alan Mishchenko
2018-02-10
3
-14
/
+65
*
Fixing input swapping issue in MUXes derived from NDR.
Alan Mishchenko
2018-02-07
2
-0
/
+4
*
Improvements to NDR to represent hierarchical designs.
Alan Mishchenko
2018-02-05
1
-2
/
+2
*
Improvements to NDR to represent hierarchical designs.
Alan Mishchenko
2018-02-05
2
-3
/
+2
*
Improvements to NDR to represent hierarchical designs.
Alan Mishchenko
2018-02-05
4
-66
/
+219
*
Suggested fix to compile on FreeBSD.
Alan Mishchenko
2018-02-04
1
-1
/
+3
*
Adding support of reading and writing designs using a new internal format (bu...
Alan Mishchenko
2018-01-29
1
-18
/
+76
*
Adding support of reading and writing designs using a new internal format.
Alan Mishchenko
2018-01-28
5
-5
/
+364
*
Experiments with circuit-based SAT.
Alan Mishchenko
2018-01-27
1
-26
/
+225
*
Experiments with circuit-based SAT.
Alan Mishchenko
2018-01-27
1
-132
/
+94
*
Experiments with circuit-based SAT.
Alan Mishchenko
2018-01-27
1
-31
/
+38
*
Experiments with circuit-based SAT.
Alan Mishchenko
2018-01-27
1
-130
/
+161
*
Experiments with circuit-based SAT.
Alan Mishchenko
2018-01-27
6
-5
/
+1309
*
Experiments with SAT-based simulation.
Alan Mishchenko
2018-01-25
8
-18
/
+59
*
Experiments with SAT-based simulation.
Alan Mishchenko
2018-01-23
5
-6
/
+146
*
Updates to exact synthesis commands.
Alan Mishchenko
2018-01-22
1
-1
/
+0
*
Updates to exact synthesis commands.
Alan Mishchenko
2018-01-19
4
-38
/
+226
*
Backing up node's truth-table to make sure it is not destroyed while deriving...
Alan Mishchenko
2018-01-19
1
-2
/
+4
*
Fixed crash in &nf when there is no buffer gate.
Alan Mishchenko
2018-01-12
1
-0
/
+5
*
Merged in Fatsie/abc/liberty_value_expression (pull request #87)
Alan Mishchenko
2018-01-05
1
-0
/
+12
|
\
|
*
Value of properties can be expression.
Staf Verhaegen
2018-01-03
1
-0
/
+12
*
|
New command 'testexact'.
Alan Mishchenko
2018-01-04
1
-2
/
+2
*
|
New command 'testexact'.
Alan Mishchenko
2018-01-04
2
-7
/
+348
|
/
*
New exact synthesis command 'allexact'.
Alan Mishchenko
2017-12-30
3
-33
/
+97
*
New exact synthesis command 'allexact'.
Alan Mishchenko
2017-12-28
1
-0
/
+2
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