iCE40/abc - [no description]

	Commit message (Collapse)	Author	Age	Files	Lines
*	Bug fix in &sat -x.	Alan Mishchenko	2018-05-07	2	-2/+5
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*	Adding &sat -x to save CEXes for multi-output combinational miters.	Alan Mishchenko	2018-05-06	4	-4/+56
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*	Updates to NDR format (bug fixes).	Alan Mishchenko	2018-05-03	4	-32/+39
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*	Updates to NDR format (flops, memories, signed mult, etc).	Alan Mishchenko	2018-04-29	10	-100/+596
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*	The ECO code (fix to the broken build).	Alan Mishchenko	2018-04-28	1	-2/+2
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*	Adding switch &w -p to dump AIG in a Verilog file.	Alan Mishchenko	2018-04-25	3	-2/+195
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*	The ECO code.	Alan Mishchenko	2018-04-25	1	-2/+11
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*	The ECO code.	Alan Mishchenko	2018-04-25	2	-8/+2500
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*	Typo in the command description.	Alan Mishchenko	2018-04-25	1	-5/+5
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*	Memory abstraction.	Alan Mishchenko	2018-04-20	4	-10/+20
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*	Memory abstraction.	Alan Mishchenko	2018-04-19	4	-154/+284
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*	Memory abstraction.	Alan Mishchenko	2018-04-15	8	-84/+1086
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*	Adding adder-subtractor primitive.	Alan Mishchenko	2018-04-11	1	-1/+3
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*	Making sure duplicated inverters are not created.	Alan Mishchenko	2018-04-11	1	-3/+9
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*	Travis: build with namespaces enabled, and	Baruch Sterin	2018-04-02	1	-5/+22
\| \| \| \|	make sure src/demo.c can be compiled under C++ and with ABC in a namespace
*	Rename new flag to ABC_USE_STDINT_H	Robert Ou	2018-03-29	2	-7/+7
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*	Add an option to use C99 stdint.h	Robert Ou	2018-03-26	2	-0/+56
\| \| \| \| \| \| \|	If ABC_HAVE_STDINT_H is defined, standard C99 headers will be used to define all of the platform-dependent types required. arch_flags will also no longer be required. This new define is optional and must be manually enabled by setting ARCHFLAGS.
*	Integrating SAT-based CEX minimization (bug fix).	Alan Mishchenko	2018-03-25	3	-11/+11
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*	Integrating SAT-based CEX minimization.	Alan Mishchenko	2018-03-25	4	-10/+145
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*	Adding new NPN code (compiler fix).	Alan Mishchenko	2018-03-25	1	-9/+9
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*	Adding new NPN code (compiler fix).	Alan Mishchenko	2018-03-25	1	-1/+1
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*	Adding new NPN code developed by XueGong Zhou at Fudan University.	Alan Mishchenko	2018-03-25	4	-144/+1098
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*	Updating &mfs to support hard objects.	Alan Mishchenko	2018-03-23	2	-2/+55
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*	Adding switch 'scorr -f' to dump inductive invariant as an AIG.	Alan Mishchenko	2018-03-22	6	-16/+36
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*	Temporary bug fix for signal names in WLC (correction).	Alan Mishchenko	2018-03-21	1	-2/+5
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*	Temporary bug fix for signal names in WLC.	Alan Mishchenko	2018-03-21	1	-0/+2
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*	Bug fix in blasting with boxes.	Alan Mishchenko	2018-03-06	1	-1/+1
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*	Extending primitives supported by WLC.	Alan Mishchenko	2018-03-03	3	-5/+85
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*	Adding parameters and improvements to %blast.	Alan Mishchenko	2018-02-28	6	-1/+20
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*	Adding parameters and improvements to %blast.	Alan Mishchenko	2018-02-28	12	-101/+307
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*	Adding support for adders with carry-in in WLC and NDR.	Alan Mishchenko	2018-02-24	5	-5/+113
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*	Bug fix in NDR handling.	Alan Mishchenko	2018-02-20	1	-6/+38
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*	Merge two branches.	Alan Mishchenko	2018-02-20	1	-33/+81
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\| *	Improvements to circuit based solver.	Alan Mishchenko	2018-02-20	1	-33/+81
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* \|	Small fix in satoko.	Bruno Schmitt	2018-02-20	2	-3/+1
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*	Compilation problem with pow().	Alan Mishchenko	2018-02-19	4	-7/+7
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*	Improvements to circuit based solver.	Alan Mishchenko	2018-02-17	1	-193/+490
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*	Extending MiniLUT to return attributes.	Alan Mishchenko	2018-02-11	2	-0/+20
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*	Experiments with LUT mapping.	Alan Mishchenko	2018-02-10	3	-14/+65
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*	Fixing input swapping issue in MUXes derived from NDR.	Alan Mishchenko	2018-02-07	2	-0/+4
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*	Improvements to NDR to represent hierarchical designs.	Alan Mishchenko	2018-02-05	1	-2/+2
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*	Improvements to NDR to represent hierarchical designs.	Alan Mishchenko	2018-02-05	2	-3/+2
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*	Improvements to NDR to represent hierarchical designs.	Alan Mishchenko	2018-02-05	4	-66/+219
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*	Suggested fix to compile on FreeBSD.	Alan Mishchenko	2018-02-04	1	-1/+3
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*	Adding support of reading and writing designs using a new internal format ↵	Alan Mishchenko	2018-01-29	1	-18/+76
\| \| \| \|	(bug fix).
*	Adding support of reading and writing designs using a new internal format.	Alan Mishchenko	2018-01-28	5	-5/+364
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*	Experiments with circuit-based SAT.	Alan Mishchenko	2018-01-27	1	-26/+225
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*	Experiments with circuit-based SAT.	Alan Mishchenko	2018-01-27	1	-132/+94
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*	Experiments with circuit-based SAT.	Alan Mishchenko	2018-01-27	1	-31/+38
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*	Experiments with circuit-based SAT.	Alan Mishchenko	2018-01-27	1	-130/+161
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