From 04dfe7cdee109750fb70525fdd3fc39949530c43 Mon Sep 17 00:00:00 2001 From: Alan Mishchenko Date: Sun, 19 Aug 2018 10:12:50 +0700 Subject: Complication problem fix. --- src/base/acb/acbFunc.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'src/base/acb/acbFunc.c') diff --git a/src/base/acb/acbFunc.c b/src/base/acb/acbFunc.c index d73d1d59..1efb5807 100644 --- a/src/base/acb/acbFunc.c +++ b/src/base/acb/acbFunc.c @@ -198,7 +198,7 @@ int Acb_WireIsTarget( int Token, Abc_Nam_t * pNames ) } void * Acb_VerilogSimpleParse( Vec_Int_t * vBuffer, Abc_Nam_t * pNames ) { - void * pDesign = NULL; + Ndr_Data_t * pDesign = NULL; Vec_Int_t * vInputs = Vec_IntAlloc(100); Vec_Int_t * vOutputs = Vec_IntAlloc(100); Vec_Int_t * vWires = Vec_IntAlloc(100); -- cgit v1.2.3