From c6af9094c092170b14d735097cdf805b90105287 Mon Sep 17 00:00:00 2001 From: Alan Mishchenko Date: Sun, 20 May 2012 17:27:53 +0700 Subject: Changing 'if' to allow for delay optimization on sequential paths only. --- src/map/if/ifSeq.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) (limited to 'src/map/if/ifSeq.c') diff --git a/src/map/if/ifSeq.c b/src/map/if/ifSeq.c index eaa33e92..6cfb5131 100644 --- a/src/map/if/ifSeq.c +++ b/src/map/if/ifSeq.c @@ -50,7 +50,7 @@ void If_ManPrepareMappingSeq( If_Man_t * p ) int i; // link the latch outputs (CIs) directly to the drivers of latch inputs (COs) - for ( i = 0; i < p->pPars->nLatches; i++ ) + for ( i = 0; i < p->pPars->nLatchesCi; i++ ) { pObjLi = If_ManLi( p, i ); pObjLo = If_ManLo( p, i ); @@ -98,13 +98,13 @@ Vec_Ptr_t * If_ManCollectLatches( If_Man_t * p ) If_Obj_t * pObj; int i; // collect latches - vLatches = Vec_PtrAlloc( p->pPars->nLatches ); + vLatches = Vec_PtrAlloc( p->pPars->nLatchesCi ); If_ManForEachLatchOutput( p, pObj, i ) If_ManCollectLatches_rec( pObj, vLatches ); // clean marks Vec_PtrForEachEntry( If_Obj_t *, vLatches, pObj, i ) pObj->fMark = 0; - assert( Vec_PtrSize(vLatches) == p->pPars->nLatches ); + assert( Vec_PtrSize(vLatches) == p->pPars->nLatchesCi ); return vLatches; } -- cgit v1.2.3