From 9206e6ff80e56c810814a9b9f61e45be8c4c4987 Mon Sep 17 00:00:00 2001
From: Alan Mishchenko <alanmi@berkeley.edu>
Date: Mon, 8 Oct 2012 21:20:13 -0700
Subject: Improvements to gate sizing.

---
 src/map/scl/sclUtil.c | 1 +
 1 file changed, 1 insertion(+)

(limited to 'src/map/scl/sclUtil.c')

diff --git a/src/map/scl/sclUtil.c b/src/map/scl/sclUtil.c
index 6a1f6a36..37efbd44 100644
--- a/src/map/scl/sclUtil.c
+++ b/src/map/scl/sclUtil.c
@@ -233,6 +233,7 @@ void Abc_SclManSetGates( SC_Lib * pLib, Abc_Ntk_t * p, Vec_Int_t * vGates )
         SC_Cell * pCell = SC_LibCell( pLib, Vec_IntEntry(vGates, Abc_ObjId(pObj)) );
         assert( pCell->n_inputs == Abc_ObjFaninNum(pObj) );
         pObj->pData = Mio_LibraryReadGateByName( (Mio_Library_t *)p->pManFunc, pCell->pName, NULL );
+        assert( pObj->fMarkA == 0 && pObj->fMarkB == 0 );
 //printf( "Found gate %s\n", pCell->name );
     }
 }
-- 
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