1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
331
332
333
334
335
336
337
338
339
340
341
342
343
344
345
346
347
348
349
350
351
352
353
354
355
356
357
358
359
360
361
362
363
364
365
366
367
368
369
370
371
372
373
374
375
376
377
378
379
380
|
/**CFile****************************************************************
FileName [giaAbs.c]
SystemName [ABC: Logic synthesis and verification system.]
PackageName [Scalable AIG package.]
Synopsis [Counter-example-guided abstraction refinement.]
Author [Alan Mishchenko]
Affiliation [UC Berkeley]
Date [Ver. 1.0. Started - June 20, 2005.]
Revision [$Id: giaAbs.c,v 1.00 2005/06/20 00:00:00 alanmi Exp $]
***********************************************************************/
#include "gia.h"
#include "giaAig.h"
#include "saig.h"
ABC_NAMESPACE_IMPL_START
////////////////////////////////////////////////////////////////////////
/// DECLARATIONS ///
////////////////////////////////////////////////////////////////////////
////////////////////////////////////////////////////////////////////////
/// FUNCTION DEFINITIONS ///
////////////////////////////////////////////////////////////////////////
/**Function*************************************************************
Synopsis [This procedure sets default parameters.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
void Gia_ManAbsSetDefaultParams( Gia_ParAbs_t * p )
{
memset( p, 0, sizeof(Gia_ParAbs_t) );
p->Algo = 0; // algorithm: CBA
p->nFramesMax = 10; // timeframes for PBA
p->nConfMax = 10000; // conflicts for PBA
p->fDynamic = 1; // dynamic unfolding for PBA
p->fConstr = 0; // use constraints
p->nFramesBmc = 250; // timeframes for BMC
p->nConfMaxBmc = 5000; // conflicts for BMC
p->nStableMax = 1000000; // the number of stable frames to quit
p->nRatio = 10; // ratio of flops to quit
p->nBobPar = 1000000; // the number of frames before trying to quit
p->fUseBdds = 0; // use BDDs to refine abstraction
p->fUseDprove = 0; // use 'dprove' to refine abstraction
p->fUseStart = 1; // use starting frame
p->fVerbose = 0; // verbose output
p->fVeryVerbose= 0; // printing additional information
p->Status = -1; // the problem status
p->nFramesDone = -1; // the number of rames covered
}
/**Function*************************************************************
Synopsis [Transform flop list into flop map.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
Vec_Int_t * Gia_ManFlops2Classes( Gia_Man_t * pGia, Vec_Int_t * vFlops )
{
Vec_Int_t * vFlopClasses;
int i, Entry;
vFlopClasses = Vec_IntStart( Gia_ManRegNum(pGia) );
Vec_IntForEachEntry( vFlops, Entry, i )
Vec_IntWriteEntry( vFlopClasses, Entry, 1 );
return vFlopClasses;
}
/**Function*************************************************************
Synopsis [Transform flop map into flop list.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
Vec_Int_t * Gia_ManClasses2Flops( Vec_Int_t * vFlopClasses )
{
Vec_Int_t * vFlops;
int i, Entry;
vFlops = Vec_IntAlloc( 100 );
Vec_IntForEachEntry( vFlopClasses, Entry, i )
if ( Entry )
Vec_IntPush( vFlops, i );
return vFlops;
}
/**Function*************************************************************
Synopsis [Performs abstraction on the AIG manager.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
Gia_Man_t * Gia_ManDupAbstractionAig( Gia_Man_t * p, Vec_Int_t * vFlops )
{
Gia_Man_t * pGia;
Aig_Man_t * pNew, * pTemp;
pNew = Gia_ManToAig( p, 0 );
pNew = Saig_ManDupAbstraction( pTemp = pNew, vFlops );
Aig_ManStop( pTemp );
pGia = Gia_ManFromAig( pNew );
// pGia->vCiNumsOrig = pNew->vCiNumsOrig;
// pNew->vCiNumsOrig = NULL;
Aig_ManStop( pNew );
return pGia;
}
/**Function*************************************************************
Synopsis [Starts abstraction by computing latch map.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
void Gia_ManCexAbstractionStart( Gia_Man_t * pGia, Gia_ParAbs_t * pPars )
{
Vec_Int_t * vFlops;
Aig_Man_t * pNew;
if ( pGia->vFlopClasses != NULL )
{
printf( "Gia_ManCexAbstractionStart(): Abstraction latch map is present but will be rederived.\n" );
Vec_IntFreeP( &pGia->vFlopClasses );
}
pNew = Gia_ManToAig( pGia, 0 );
vFlops = Saig_ManCexAbstractionFlops( pNew, pPars );
pGia->pCexSeq = pNew->pSeqModel; pNew->pSeqModel = NULL;
Aig_ManStop( pNew );
if ( vFlops )
{
pGia->vFlopClasses = Gia_ManFlops2Classes( pGia, vFlops );
Vec_IntFree( vFlops );
}
}
/**Function*************************************************************
Synopsis [Refines abstraction using the latch map.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
int Gia_ManCexAbstractionRefine( Gia_Man_t * pGia, Abc_Cex_t * pCex, int fTryFour, int fSensePath, int fVerbose )
{
Aig_Man_t * pNew;
Vec_Int_t * vFlops;
if ( pGia->vFlopClasses == NULL )
{
printf( "Gia_ManCexAbstractionRefine(): Abstraction latch map is missing.\n" );
return -1;
}
pNew = Gia_ManToAig( pGia, 0 );
vFlops = Gia_ManClasses2Flops( pGia->vFlopClasses );
if ( !Saig_ManCexRefineStep( pNew, vFlops, pCex, fTryFour, fSensePath, fVerbose ) )
{
pGia->pCexSeq = pNew->pSeqModel; pNew->pSeqModel = NULL;
Vec_IntFree( vFlops );
Aig_ManStop( pNew );
return 0;
}
Vec_IntFree( pGia->vFlopClasses );
pGia->vFlopClasses = Gia_ManFlops2Classes( pGia, vFlops );
Vec_IntFree( vFlops );
Aig_ManStop( pNew );
return -1;
}
/**Function*************************************************************
Synopsis [Transform flop list into flop map.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
Vec_Int_t * Gia_ManFlopsSelect( Vec_Int_t * vFlops, Vec_Int_t * vFlopsNew )
{
Vec_Int_t * vSelected;
int i, Entry;
vSelected = Vec_IntAlloc( Vec_IntSize(vFlopsNew) );
Vec_IntForEachEntry( vFlopsNew, Entry, i )
Vec_IntPush( vSelected, Vec_IntEntry(vFlops, Entry) );
return vSelected;
}
/**Function*************************************************************
Synopsis [Adds flops that should be present in the abstraction.]
Description [The second argument (vAbsFfsToAdd) is the array of numbers
of previously abstrated flops (flops replaced by PIs in the abstracted model)
that should be present in the abstraction as real flops.]
SideEffects []
SeeAlso []
***********************************************************************/
void Gia_ManFlopsAddToClasses( Vec_Int_t * vFlopClasses, Vec_Int_t * vAbsFfsToAdd )
{
Vec_Int_t * vMapEntries;
int i, Entry, iFlopNum;
// map previously abstracted flops into their original numbers
vMapEntries = Vec_IntAlloc( Vec_IntSize(vFlopClasses) );
Vec_IntForEachEntry( vFlopClasses, Entry, i )
if ( Entry == 0 )
Vec_IntPush( vMapEntries, i );
// add these flops as real flops
Vec_IntForEachEntry( vAbsFfsToAdd, Entry, i )
{
iFlopNum = Vec_IntEntry( vMapEntries, Entry );
assert( Vec_IntEntry( vFlopClasses, iFlopNum ) == 0 );
Vec_IntWriteEntry( vFlopClasses, iFlopNum, 1 );
}
Vec_IntFree( vMapEntries );
}
/**Function*************************************************************
Synopsis [Derive unrolled timeframes.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
int Gia_ManCbaPerform( Gia_Man_t * pGia, void * p )
{
Gia_Man_t * pAbs;
Aig_Man_t * pAig, * pOrig;
Vec_Int_t * vAbsFfsToAdd;
// check if flop classes are given
if ( pGia->vFlopClasses == NULL )
{
Abc_Print( 0, "Initial flop map is not given. Trivial abstraction is assumed.\n" );
pGia->vFlopClasses = Vec_IntStart( Gia_ManRegNum(pGia) );
}
// derive abstraction
pAbs = Gia_ManDupAbstraction( pGia, pGia->vFlopClasses );
pAig = Gia_ManToAigSimple( pAbs );
Gia_ManStop( pAbs );
// refine abstraction using CBA
vAbsFfsToAdd = Saig_ManCbaPerform( pAig, Gia_ManPiNum(pGia), p );
if ( vAbsFfsToAdd == NULL ) // found true CEX
{
assert( pAig->pSeqModel != NULL );
printf( "Refinement did not happen. Discovered a true counter-example.\n" );
printf( "Remapping counter-example from %d to %d primary inputs.\n", Aig_ManPiNum(pAig), Gia_ManPiNum(pGia) );
// derive new counter-example
pOrig = Gia_ManToAigSimple( pGia );
pGia->pCexSeq = Saig_ManCexRemap( pOrig, pAig, pAig->pSeqModel );
Aig_ManStop( pOrig );
Aig_ManStop( pAig );
return 0;
}
Aig_ManStop( pAig );
// update flop classes
Gia_ManFlopsAddToClasses( pGia->vFlopClasses, vAbsFfsToAdd );
Vec_IntFree( vAbsFfsToAdd );
return -1;
}
/**Function*************************************************************
Synopsis [Derive unrolled timeframes.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
int Gia_ManPbaPerform( Gia_Man_t * pGia, int nFrames, int nConfLimit, int fVerbose )
{
Gia_Man_t * pAbs;
Aig_Man_t * pAig, * pOrig;
Vec_Int_t * vFlops, * vFlopsNew, * vSelected;
if ( pGia->vFlopClasses == NULL )
{
printf( "Gia_ManPbaPerform(): Abstraction flop map is missing.\n" );
return 0;
}
// derive abstraction
pAbs = Gia_ManDupAbstraction( pGia, pGia->vFlopClasses );
// refine abstraction using PBA
pAig = Gia_ManToAigSimple( pAbs );
Gia_ManStop( pAbs );
vFlopsNew = Saig_ManPbaDerive( pAig, Gia_ManPiNum(pGia), nFrames, nConfLimit, fVerbose );
Aig_ManStop( pAig );
// derive new classes
if ( pAig->pSeqModel == NULL )
{
// the problem is UNSAT
vFlops = Gia_ManClasses2Flops( pGia->vFlopClasses );
vSelected = Gia_ManFlopsSelect( vFlops, vFlopsNew );
Vec_IntFree( pGia->vFlopClasses );
pGia->vFlopClasses = Saig_ManFlops2Classes( Gia_ManRegNum(pGia), vSelected );
Vec_IntFree( vSelected );
Vec_IntFree( vFlopsNew );
Vec_IntFree( vFlops );
return -1;
}
else if ( vFlopsNew == NULL )
{
// found real counter-example
assert( pAig->pSeqModel != NULL );
printf( "Refinement did not happen. Discovered a true counter-example.\n" );
printf( "Remapping counter-example from %d to %d primary inputs.\n", Aig_ManPiNum(pAig), Gia_ManPiNum(pGia) );
// derive new counter-example
pOrig = Gia_ManToAigSimple( pGia );
pGia->pCexSeq = Saig_ManCexRemap( pOrig, pAig, pAig->pSeqModel );
Aig_ManStop( pOrig );
Aig_ManStop( pAig );
return 0;
}
else
{
// found counter-eample for the abstracted model
// update flop classes
Vec_Int_t * vAbsFfsToAdd = vFlopsNew;
Gia_ManFlopsAddToClasses( pGia->vFlopClasses, vAbsFfsToAdd );
Vec_IntFree( vAbsFfsToAdd );
return -1;
}
}
////////////////////////////////////////////////////////////////////////
/// END OF FILE ///
////////////////////////////////////////////////////////////////////////
ABC_NAMESPACE_IMPL_END
|
