1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
331
332
333
334
335
336
337
338
339
340
341
342
343
344
345
346
347
348
349
350
351
352
353
354
355
356
357
358
359
360
361
362
363
364
365
366
367
368
369
370
371
372
373
374
375
376
377
378
379
380
381
382
383
384
385
386
387
388
389
390
391
392
393
394
395
396
397
398
399
400
401
402
403
404
405
406
407
408
409
410
411
412
413
414
415
416
417
418
419
420
421
422
423
424
425
426
427
428
429
430
431
432
433
434
435
436
437
438
439
440
441
442
443
444
445
446
447
448
449
450
451
452
453
454
455
456
457
458
459
460
461
462
463
464
465
466
467
468
469
470
471
472
473
474
475
476
477
478
479
480
481
482
483
484
485
486
487
488
489
490
491
492
493
494
495
496
497
498
499
500
501
502
503
504
505
506
507
508
509
510
511
512
513
514
515
516
517
518
519
520
521
522
523
524
525
526
527
528
529
530
531
532
533
534
535
536
537
538
539
540
541
542
543
544
545
546
547
548
549
550
551
552
553
554
555
556
557
558
559
560
561
562
563
564
565
566
567
568
569
570
571
572
573
574
575
576
577
578
579
580
581
582
583
584
585
586
587
588
589
590
591
592
593
594
595
596
597
598
599
600
601
602
603
604
605
606
607
608
609
610
611
612
613
614
615
616
617
618
619
620
621
622
623
624
625
626
627
628
629
630
631
632
633
634
635
636
637
638
639
640
641
642
643
644
645
646
647
648
649
650
651
652
653
654
655
656
657
658
659
660
661
662
663
664
665
666
667
668
669
670
671
672
673
674
675
676
677
678
679
680
681
682
683
684
685
686
687
688
689
690
691
692
693
694
695
696
697
698
699
700
701
702
703
704
705
706
707
708
709
710
711
712
713
714
715
716
717
718
719
720
721
722
723
724
725
726
727
728
729
730
731
732
733
734
735
736
737
738
739
740
741
742
743
744
745
746
747
748
749
750
751
752
753
754
755
756
|
/**CFile****************************************************************
FileName [cbaReadVer.c]
SystemName [ABC: Logic synthesis and verification system.]
PackageName [Verilog parser.]
Synopsis [Parses several flavors of word-level Verilog.]
Author [Alan Mishchenko]
Affiliation [UC Berkeley]
Date [Ver. 1.0. Started - November 29, 2014.]
Revision [$Id: cbaReadVer.c,v 1.00 2014/11/29 00:00:00 alanmi Exp $]
***********************************************************************/
#include "cba.h"
#include "cbaPrs.h"
ABC_NAMESPACE_IMPL_START
////////////////////////////////////////////////////////////////////////
/// DECLARATIONS ///
////////////////////////////////////////////////////////////////////////
// Verilog keywords
typedef enum {
CBA_VER_NONE = 0, // 0: unused
CBA_VER_MODULE, // 1: module
CBA_VER_INOUT, // 2: inout
CBA_VER_INPUT, // 3: input
CBA_VER_OUTPUT, // 4: output
CBA_VER_WIRE, // 5: wire
CBA_VER_ASSIGN, // 6: assign
CBA_VER_REG, // 7: reg
CBA_VER_ALWAYS, // 8: always
CBA_VER_DEFPARAM, // 9: always
CBA_VER_BEGIN, // 10: begin
CBA_VER_END, // 11: end
CBA_VER_ENDMODULE, // 12: endmodule
CBA_VER_UNKNOWN // 13: unknown
} Cba_VerType_t;
const char * s_VerTypes[CBA_VER_UNKNOWN+1] = {
NULL, // 0: unused
"module", // 1: module
"inout", // 2: inout
"input", // 3: input
"output", // 4: output
"wire", // 5: wire
"assign", // 6: assign
"reg", // 7: reg
"always", // 8: always
"defparam", // 9: defparam
"begin", // 10: begin
"end", // 11: end
"endmodule", // 12: endmodule
NULL // 13: unknown
};
static inline void Cba_PrsAddVerilogDirectives( Cba_Prs_t * p )
{
int i;
for ( i = 1; s_VerTypes[i]; i++ )
Abc_NamStrFindOrAdd( p->pDesign->pNames, (char *)s_VerTypes[i], NULL );
assert( Abc_NamObjNumMax(p->pDesign->pNames) == i );
}
// character recognition
static inline int Cba_IsSpace( char c ) { return (c == ' ' || c == '\t' || c == '\r' || c == '\n'); }
static inline int Cba_IsDigit( char c ) { return (c >= '0' && c <= '9'); }
static inline int Cba_IsDigitB( char c ) { return (c == '0' || c == '1' || c == 'x' || c == 'z'); }
static inline int Cba_IsDigitH( char c ) { return (c >= '0' && c <= '9') || (c >= 'A' && c <= 'F') || (c >= 'a' && c <= 'f'); }
static inline int Cba_IsChar( char c ) { return (c >= 'a' && c <= 'z') || (c >= 'A' && c <= 'Z'); }
static inline int Cba_IsSymb1( char c ) { return Cba_IsChar(c) || c == '_'; }
static inline int Cba_IsSymb2( char c ) { return Cba_IsSymb1(c) || Cba_IsDigit(c) || c == '$'; }
static inline int Cba_PrsIsChar( Cba_Prs_t * p, char c ) { return *p->pCur == c; }
static inline int Cba_PrsIsChar1( Cba_Prs_t * p, char c ) { return p->pCur[1] == c; }
static inline int Cba_PrsIsDigit( Cba_Prs_t * p ) { return Cba_IsDigit(*p->pCur); }
////////////////////////////////////////////////////////////////////////
/// FUNCTION DEFINITIONS ///
////////////////////////////////////////////////////////////////////////
/**Function*************************************************************
Synopsis []
Description []
SideEffects []
SeeAlso []
***********************************************************************/
// collect predefined modules names
const char * s_KnownModules[100] = {
NULL, // 0: unused
"const", // 1: constant
"buf", // 2: buffer
"not", // 3: inverter
"and", // 4: AND
"nand", // 5: OR
"or", // 6: XOR
"nor", // 7: NAND
"xor", // 8: NOR
"xnor", // 9: .XNOR
"mux", // 10: MUX
"maj", // 11: MAJ
"VERIFIC_",
"wide_",
"reduce_",
"equal_",
"not_equal_",
"sub_",
"add_",
"mult_",
"mux_",
"Mux_",
"Select_",
"Decoder_",
"LessThan_",
"ReadPort_",
"WritePort_",
"ClockedWritePort_",
NULL
};
// check if it is a known module
static inline int Cba_PrsIsKnownModule( Cba_Prs_t * p, char * pName )
{
int i;
for ( i = 1; s_KnownModules[i]; i++ )
if ( !strncmp(pName, s_KnownModules[i], strlen(s_KnownModules[i])) )
return i;
return 0;
}
/**Function*************************************************************
Synopsis []
Description []
SideEffects []
SeeAlso []
***********************************************************************/
// skips Verilog comments (returns 1 if some comments were skipped)
static inline int Cba_PrsUtilSkipComments( Cba_Prs_t * p )
{
if ( !Cba_PrsIsChar(p, '/') )
return 0;
if ( Cba_PrsIsChar1(p, '/') )
{
for ( p->pCur += 2; p->pCur < p->pLimit; p->pCur++ )
if ( Cba_PrsIsChar(p, '\n') )
{ p->pCur++; return 1; }
}
else if ( Cba_PrsIsChar1(p, '*') )
{
for ( p->pCur += 2; p->pCur < p->pLimit; p->pCur++ )
if ( Cba_PrsIsChar(p, '*') && Cba_PrsIsChar1(p, '/') )
{ p->pCur++; p->pCur++; return 1; }
}
return 0;
}
static inline int Cba_PrsUtilSkipName( Cba_Prs_t * p )
{
if ( !Cba_PrsIsChar(p, '\\') )
return 0;
for ( p->pCur++; p->pCur < p->pLimit; p->pCur++ )
if ( Cba_PrsIsChar(p, ' ') )
{ p->pCur++; return 1; }
return 0;
}
// skip any number of spaces and comments
static inline int Cba_PrsUtilSkipSpaces( Cba_Prs_t * p )
{
while ( p->pCur < p->pLimit )
{
while ( Cba_IsSpace(*p->pCur) )
p->pCur++;
if ( !*p->pCur )
return Cba_PrsErrorSet(p, "Unexpectedly reached end-of-file.", 1);
if ( !Cba_PrsUtilSkipComments(p) )
return 0;
}
return Cba_PrsErrorSet(p, "Unexpectedly reached end-of-file.", 1);
}
// skip everything including comments until the given char
static inline int Cba_PrsUtilSkipUntil( Cba_Prs_t * p, char c )
{
while ( p->pCur < p->pLimit )
{
if ( Cba_PrsIsChar(p, c) )
return 1;
if ( Cba_PrsUtilSkipComments(p) )
continue;
if ( Cba_PrsUtilSkipName(p) )
continue;
p->pCur++;
}
return 0;
}
// skip everything including comments until the given word
static inline int Cba_PrsUtilSkipUntilWord( Cba_Prs_t * p, char * pWord )
{
char * pPlace = strstr( p->pCur, pWord );
if ( pPlace == NULL ) return 1;
p->pCur = pPlace + strlen(pWord);
return 0;
}
/*
signal is a pair {NameId; RangeId}
if ( RangeId == 0 ) this is name without range
if ( RangeId == -1 ) this is constant
if ( RangeId == -2 ) this is concatenation
*/
/**Function*************************************************************
Synopsis []
Description []
SideEffects []
SeeAlso []
***********************************************************************/
static inline int Cba_PrsReadName( Cba_Prs_t * p )
{
char * pStart = p->pCur;
if ( Cba_PrsIsChar(p, '\\') ) // escaped name
{
pStart = ++p->pCur;
while ( !Cba_PrsIsChar(p, ' ') )
p->pCur++;
}
else if ( Cba_IsSymb1(*p->pCur) ) // simple name
{
p->pCur++;
while ( Cba_IsSymb2(*p->pCur) )
p->pCur++;
}
else
return 0;
return Abc_NamStrFindOrAddLim( p->pDesign->pNames, pStart, p->pCur, NULL );
}
static inline int Cba_PrsReadConstant( Cba_Prs_t * p )
{
char * pStart = p->pCur;
assert( Cba_PrsIsDigit(p) );
while ( Cba_PrsIsDigit(p) )
p->pCur++;
if ( !Cba_PrsIsChar(p, '\'') ) return Cba_PrsErrorSet(p, "Cannot read constant.", 0);
p->pCur++;
if ( Cba_PrsIsChar(p, 'b') )
{
p->pCur++;
while ( Cba_IsDigitB(*p->pCur) )
p->pCur++;
}
else if ( Cba_PrsIsChar(p, 'h') )
{
p->pCur++;
while ( Cba_IsDigitH(*p->pCur) )
p->pCur++;
}
else if ( Cba_PrsIsChar(p, 'd') )
{
p->pCur++;
while ( Cba_PrsIsDigit(p) )
p->pCur++;
}
else return Cba_PrsErrorSet(p, "Cannot read radix of constant.", 0);
return Abc_NamStrFindOrAddLim( p->pDesign->pNames, pStart, p->pCur, NULL );
}
static inline int Cba_PrsReadRange( Cba_Prs_t * p )
{
assert( Cba_PrsIsChar(p, '[') );
Vec_StrClear( &p->vCover );
Vec_StrPush( &p->vCover, *p->pCur++ );
if ( Cba_PrsUtilSkipSpaces(p) ) return 0;
if ( !Cba_PrsIsDigit(p) ) return Cba_PrsErrorSet(p, "Cannot read digit in range specification.", 0);
while ( Cba_PrsIsDigit(p) )
Vec_StrPush( &p->vCover, *p->pCur++ );
if ( Cba_PrsUtilSkipSpaces(p) ) return 0;
if ( Cba_PrsIsChar(p, ':') )
{
Vec_StrPush( &p->vCover, *p->pCur++ );
if ( Cba_PrsUtilSkipSpaces(p) ) return 0;
if ( !Cba_PrsIsDigit(p) ) return Cba_PrsErrorSet(p, "Cannot read digit in range specification.", 0);
while ( Cba_PrsIsDigit(p) )
Vec_StrPush( &p->vCover, *p->pCur++ );
if ( Cba_PrsUtilSkipSpaces(p) ) return 0;
}
if ( !Cba_PrsIsChar(p, ']') ) return Cba_PrsErrorSet(p, "Cannot read closing brace in range specification.", 0);
Vec_StrPush( &p->vCover, *p->pCur++ );
Vec_StrPush( &p->vCover, '\0' );
return Abc_NamStrFindOrAdd( p->pDesign->pNames, Vec_StrArray(&p->vCover), NULL );
}
static inline int Cba_PrsReadSignal( Cba_Prs_t * p, int * pName, int * pRange )
{
*pName = *pRange = 0;
if ( Cba_PrsUtilSkipSpaces(p) ) return 0;
if ( Cba_PrsIsDigit(p) )
{
*pName = Cba_PrsReadConstant(p);
if ( *pName == 0 ) return 0;
if ( Cba_PrsUtilSkipSpaces(p) ) return 0;
*pRange = -1;
return 1;
}
*pName = Cba_PrsReadName( p );
if ( *pName == 0 )
return 1;
if ( Cba_PrsUtilSkipSpaces(p) ) return 0;
if ( !Cba_PrsIsChar(p, '[') )
return 1;
*pRange = Cba_PrsReadRange(p);
if ( *pRange == 0 ) return 0;
if ( Cba_PrsUtilSkipSpaces(p) ) return 0;
return 1;
}
static inline int Cba_PrsReadSignalList( Cba_Prs_t * p, Vec_Int_t * vTemp, char LastSymb )
{
Vec_IntClear( vTemp );
while ( 1 )
{
int NameId, RangeId;
if ( !Cba_PrsReadSignal(p, &NameId, &RangeId) ) return 0;
if ( NameId == 0 ) return Cba_PrsErrorSet(p, "Cannot read signal in the list.", 0);
Vec_IntPushTwo( vTemp, NameId, RangeId );
if ( Cba_PrsIsChar(p, LastSymb) ) break;
if ( !Cba_PrsIsChar(p, ',') ) return Cba_PrsErrorSet(p, "Expecting comma in the list.", 0);
p->pCur++;
}
assert( Vec_IntSize(vTemp) > 0 );
assert( Vec_IntSize(vTemp) % 2 == 0 );
return 1;
}
static inline int Cba_PrsReadConcat( Cba_Prs_t * p, Vec_Int_t * vTemp2 )
{
assert( Cba_PrsIsChar(p, '{') );
p->pCur++;
if ( !Cba_PrsReadSignalList(p, vTemp2, '}') ) return 0;
// check final
assert( Cba_PrsIsChar(p, '}') );
p->pCur++;
// return special case
if ( Vec_IntSize(vTemp2) == 2 ) return -1; // trivial concatentation
assert( Vec_IntSize(vTemp2) > 2 );
assert( Vec_IntSize(vTemp2) % 2 == 0 );
// create new concatentation
Vec_IntPush( &p->vTypesCur, CBA_PRS_CONCAT );
Vec_IntPush( &p->vFuncsCur, 0 );
Vec_IntPush( &p->vInstIdsCur, 0 );
Cba_PrsSetupVecInt( p, Vec_WecPushLevel(&p->vFaninsCur), vTemp2 );
// return the result
assert( Vec_WecSize(&p->vFaninsCur) > 0 );
return Vec_WecSize(&p->vFaninsCur);
}
static inline int Cba_PrsReadSignalOrConcat( Cba_Prs_t * p, int * pName, int * pRange )
{
if ( Cba_PrsUtilSkipSpaces(p) ) return 0;
if ( Cba_PrsIsChar(p, '{') )
{
int Status = Cba_PrsReadConcat(p, &p->vTemp2);
if ( Status == 0 ) return 0;
*pName = Status == -1 ? Vec_IntEntry( &p->vTemp2, 0 ) : Status;
*pRange = Status == -1 ? Vec_IntEntry( &p->vTemp2, 1 ) : -2;
if ( Cba_PrsUtilSkipSpaces(p) ) return 0;
}
else
{
if ( !Cba_PrsReadSignal(p, pName, pRange) ) return 0;
if ( *pName == 0 ) return Cba_PrsErrorSet(p, "Cannot read formal name in the list.", 0);
}
return 1;
}
static inline int Cba_PrsReadSignalList1( Cba_Prs_t * p, Vec_Int_t * vTemp )
{
Vec_IntClear( vTemp );
while ( 1 )
{
int NameId, RangeId;
if ( !Cba_PrsReadSignalOrConcat(p, &NameId, &RangeId) ) return 0;
if ( NameId == 0 ) return Cba_PrsErrorSet(p, "Cannot read signal or concatenation in the list.", 0);
Vec_IntPushTwo( vTemp, NameId, RangeId );
if ( Cba_PrsIsChar(p, ')') ) break;
if ( !Cba_PrsIsChar(p, ',') ) return Cba_PrsErrorSet(p, "Expecting comma in the list.", 0);
p->pCur++;
}
p->pCur++;
if ( Cba_PrsUtilSkipSpaces(p) ) return 0;
if ( !Cba_PrsIsChar(p, ';') ) return Cba_PrsErrorSet(p, "Expecting semicolon in the instance.", 0);
assert( Vec_IntSize(vTemp) > 0 );
assert( Vec_IntSize(vTemp) % 2 == 0 );
return 1;
}
static inline int Cba_PrsReadSignalList2( Cba_Prs_t * p, Vec_Int_t * vTemp )
{
int FormId, NameId, RangeId;
Vec_IntClear( vTemp );
assert( Cba_PrsIsChar(p, '.') );
while ( Cba_PrsIsChar(p, '.') )
{
p->pCur++;
if ( !Cba_PrsReadSignal(p, &FormId, &RangeId) ) return 0;
if ( FormId == 0 ) return Cba_PrsErrorSet(p, "Cannot read formal name of the instance.", 0);
if ( RangeId != 0 ) return Cba_PrsErrorSet(p, "Formal signal cannot have range.", 0);
if ( !Cba_PrsIsChar(p, '(') ) return Cba_PrsErrorSet(p, "Cannot read \"(\" in the instance.", 0);
p->pCur++;
if ( Cba_PrsUtilSkipSpaces(p) ) return 0;
if ( !Cba_PrsReadSignalOrConcat(p, &NameId, &RangeId) ) return 0;
if ( NameId == 0 ) return Cba_PrsErrorSet(p, "Cannot read actual name of the instance.", 0);
if ( !Cba_PrsIsChar(p, ')') ) return Cba_PrsErrorSet(p, "Cannot read \")\" in the instance.", 0);
p->pCur++;
Vec_IntPush( vTemp, FormId );
Vec_IntPushTwo( vTemp, NameId, RangeId );
if ( Cba_PrsUtilSkipSpaces(p) ) return 0;
if ( Cba_PrsIsChar(p, ')') ) break;
if ( !Cba_PrsIsChar(p, ',') ) return Cba_PrsErrorSet(p, "Expecting comma in the instance.", 0);
p->pCur++;
if ( Cba_PrsUtilSkipSpaces(p) ) return 0;
}
p->pCur++;
if ( Cba_PrsUtilSkipSpaces(p) ) return 0;
if ( !Cba_PrsIsChar(p, ';') ) return Cba_PrsErrorSet(p, "Expecting semicolon in the instance.", 0);
assert( Vec_IntSize(vTemp) > 0 );
assert( Vec_IntSize(vTemp) % 3 == 0 );
return 1;
}
/**Function*************************************************************
Synopsis []
Description []
SideEffects []
SeeAlso []
***********************************************************************/
static inline int Cba_PrsReadDeclaration( Cba_Prs_t * p, int Type )
{
int NameId, RangeId, RangeIdTemp, i;
Vec_Int_t * vSigs[4] = { &p->vInoutsCur, &p->vInputsCur, &p->vOutputsCur, &p->vWiresCur };
assert( Type >= CBA_VER_INOUT && Type <= CBA_VER_WIRE );
if ( Cba_PrsUtilSkipSpaces(p) ) return 0;
RangeId = 0;
if ( Cba_PrsIsChar(p, '[') && !(RangeId = Cba_PrsReadRange(p)) ) return 0;
if ( !Cba_PrsReadSignalList( p, &p->vTemp, ';' ) ) return 0;
Vec_IntForEachEntryDouble( &p->vTemp, NameId, RangeIdTemp, i )
{
if ( RangeIdTemp ) return Cba_PrsErrorSet(p, "Range is specified twice in the declaration.", 0);
Vec_IntPushTwo( vSigs[Type - CBA_VER_INOUT], NameId, RangeId );
}
return 1;
}
static inline int Cba_PrsReadAssign( Cba_Prs_t * p )
{
int OutName = 0, InName = 0, RangeId = 0, fCompl = 0, Oper = 0;
Vec_IntClear( &p->vTemp );
// read output name
if ( !Cba_PrsReadSignal(p, &OutName, &RangeId) ) return 0;
if ( OutName == 0 ) return Cba_PrsErrorSet(p, "Cannot read output in assign-statement.", 0);
if ( !Cba_PrsIsChar(p, '=') ) return Cba_PrsErrorSet(p, "Expecting \"=\" in assign-statement.", 0);
p->pCur++;
if ( Cba_PrsUtilSkipSpaces(p) ) return 0;
if ( Cba_PrsIsChar(p, '~') )
{
fCompl = 1;
p->pCur++;
}
Vec_IntPush( &p->vTemp, OutName );
Vec_IntPush( &p->vTemp, RangeId );
// read first name
if ( !Cba_PrsReadSignal(p, &InName, &RangeId)) return 0;
if ( InName == 0 ) return Cba_PrsErrorSet(p, "Cannot read first input name in the assign-statement.", 0);
Vec_IntPush( &p->vTemp, InName );
Vec_IntPush( &p->vTemp, RangeId );
// check unary operator
if ( Cba_PrsIsChar(p, ';') )
{
Vec_IntPush( &p->vTypesCur, CBA_PRS_NODE );
Vec_IntPush( &p->vFuncsCur, fCompl ? CBA_NODE_INV : CBA_NODE_BUF );
Vec_IntPush( &p->vInstIdsCur, 0 );
Cba_PrsSetupVecInt( p, Vec_WecPushLevel(&p->vFaninsCur), &p->vTemp );
return 1;
}
if ( Cba_PrsIsChar(p, '&') )
Oper = CBA_NODE_AND;
else if ( Cba_PrsIsChar(p, '|') )
Oper = CBA_NODE_OR;
else if ( Cba_PrsIsChar(p, '^') )
Oper = fCompl ? CBA_NODE_XNOR : CBA_NODE_XOR;
else if ( Cba_PrsIsChar(p, '?') )
Oper = CBA_NODE_MUX;
else return Cba_PrsErrorSet(p, "Unrecognized operator in the assign-statement.", 0);
p->pCur++;
// read second name
if ( !Cba_PrsReadSignal(p, &InName, &RangeId)) return 0;
if ( InName == 0 ) return Cba_PrsErrorSet(p, "Cannot read second input name in the assign-statement.", 0);
Vec_IntPush( &p->vTemp, InName );
Vec_IntPush( &p->vTemp, RangeId );
// read third argument
if ( Oper == CBA_NODE_MUX )
{
assert( fCompl == 0 );
if ( !Cba_PrsIsChar(p, ':') ) return Cba_PrsErrorSet(p, "Expected colon in the MUX assignment.", 0);
p->pCur++;
// read third name
if ( !Cba_PrsReadSignal(p, &InName, &RangeId)) return 0;
if ( InName == 0 ) return Cba_PrsErrorSet(p, "Cannot read third input name in the assign-statement.", 0);
Vec_IntPush( &p->vTemp, InName );
Vec_IntPush( &p->vTemp, RangeId );
if ( !Cba_PrsIsChar(p, ';') ) return Cba_PrsErrorSet(p, "Expected semicolon at the end of the assign-statement.", 0);
}
// write binary operator
Vec_IntPush( &p->vTypesCur, CBA_PRS_NODE );
Vec_IntPush( &p->vFuncsCur, Oper );
Vec_IntPush( &p->vInstIdsCur, 0 );
Cba_PrsSetupVecInt( p, Vec_WecPushLevel(&p->vFaninsCur), &p->vTemp );
return 1;
}
static inline int Cba_PrsReadInstance( Cba_Prs_t * p, int Func )
{
// have to assign Type, Func, InstId, vFanins
int InstId, Status, Type;
Vec_IntClear( &p->vTemp );
if ( Cba_PrsUtilSkipSpaces(p) ) return 0;
InstId = Cba_PrsReadName( p );
if ( InstId && Cba_PrsUtilSkipSpaces(p) ) return 0;
if ( !Cba_PrsIsChar(p, '(') ) return Cba_PrsErrorSet(p, "Expecting \"(\" in module instantiation.", 0);
p->pCur++;
if ( Cba_PrsUtilSkipSpaces(p) ) return 0;
if ( Cba_PrsIsChar(p, '.') ) // node
Status = Cba_PrsReadSignalList2(p, &p->vTemp), Type = CBA_PRS_BOX;
else
Status = Cba_PrsReadSignalList1(p, &p->vTemp), Type = CBA_PRS_NODE;
if ( Status == 0 ) return 0;
// translate elementary gate
if ( Type == CBA_PRS_NODE )
{
int iFuncNew = Cba_PrsIsKnownModule(p, Abc_NamStr(p->pDesign->pNames, Func));
if ( iFuncNew == 0 ) return Cba_PrsErrorSet(p, "Cannot find elementary gate.", 0);
Func = iFuncNew;
}
// assign
Vec_IntPush( &p->vTypesCur, Type );
Vec_IntPush( &p->vFuncsCur, Func );
Vec_IntPush( &p->vInstIdsCur, InstId );
Cba_PrsSetupVecInt( p, Vec_WecPushLevel(&p->vFaninsCur), &p->vTemp );
return 1;
}
// this procedure can return:
// 0 = reached end-of-file; 1 = successfully parsed; 2 = recognized as primitive; 3 = failed and skipped; 4 = error (failed and could not skip)
static inline int Cba_PrsReadModule( Cba_Prs_t * p )
{
int iToken, Status;
if ( p->iModuleName != 0 ) return Cba_PrsErrorSet(p, "Parsing previous module is unfinished.", 4);
if ( Cba_PrsUtilSkipSpaces(p) )
{
Cba_PrsErrorClear( p );
return 0;
}
// read keyword
iToken = Cba_PrsReadName( p );
if ( iToken != CBA_VER_MODULE ) return Cba_PrsErrorSet(p, "Cannot read \"module\" keyword.", 4);
if ( Cba_PrsUtilSkipSpaces(p) ) return 4;
// read module name
p->iModuleName = Cba_PrsReadName( p );
if ( p->iModuleName == 0 ) return Cba_PrsErrorSet(p, "Cannot read module name.", 4);
if ( Cba_PrsIsKnownModule(p, Abc_NamStr(p->pDesign->pNames, p->iModuleName)) )
{
if ( Cba_PrsUtilSkipUntilWord( p, "endmodule" ) ) return Cba_PrsErrorSet(p, "Cannot find \"endmodule\" keyword.", 4);
//printf( "Warning! Skipped known module \"%s\".\n", Abc_NamStr(p->pDesign->pNames, p->iModuleName) );
Vec_IntPush( &p->vKnown, p->iModuleName );
p->iModuleName = 0;
return 2;
}
// skip arguments
if ( Cba_PrsUtilSkipSpaces(p) ) return 4;
if ( !Cba_PrsIsChar(p, '(') ) return Cba_PrsErrorSet(p, "Cannot find \"(\" in the argument declaration.", 4);
if ( !Cba_PrsUtilSkipUntil(p,')') ) return 4;
assert( *p->pCur == ')' );
p->pCur++;
if ( Cba_PrsUtilSkipSpaces(p) ) return 4;
// read declarations and instances
while ( Cba_PrsIsChar(p, ';') )
{
p->pCur++;
if ( Cba_PrsUtilSkipSpaces(p) ) return 4;
iToken = Cba_PrsReadName( p );
if ( iToken == CBA_VER_ENDMODULE )
{
Vec_IntPush( &p->vSucceeded, p->iModuleName );
Cba_PrsAddCurrentModel( p, p->iModuleName );
p->iModuleName = 0;
return 1;
}
if ( iToken >= CBA_VER_INOUT && iToken <= CBA_VER_WIRE ) // declaration
Status = Cba_PrsReadDeclaration( p, iToken );
else if ( iToken == CBA_VER_REG || iToken == CBA_VER_DEFPARAM ) // unsupported keywords
Status = Cba_PrsUtilSkipUntil( p, ';' );
else // read instance
{
if ( iToken == CBA_VER_ASSIGN )
Status = Cba_PrsReadAssign( p );
else
Status = Cba_PrsReadInstance( p, iToken );
if ( Status == 0 )
{
if ( Cba_PrsUtilSkipUntilWord( p, "endmodule" ) ) return Cba_PrsErrorSet(p, "Cannot find \"endmodule\" keyword.", 4);
//printf( "Warning! Failed to parse \"%s\". Adding module \"%s\" as blackbox.\n",
// Abc_NamStr(p->pDesign->pNames, iToken), Abc_NamStr(p->pDesign->pNames, p->iModuleName) );
Vec_IntPush( &p->vFailed, p->iModuleName );
// cleanup
Vec_IntClear( &p->vWiresCur );
ABC_FREE( p->vFaninsCur.pArray );
Vec_WecZero( &p->vFaninsCur );
Vec_IntClear( &p->vTypesCur );
Vec_IntClear( &p->vFuncsCur );
Vec_IntClear( &p->vInstIdsCur );
// add
Cba_PrsAddCurrentModel( p, p->iModuleName );
Cba_PrsErrorClear( p );
p->iModuleName = 0;
return 3;
}
}
if ( !Status ) return 4;
if ( Cba_PrsUtilSkipSpaces(p) ) return 4;
}
return Cba_PrsErrorSet(p, "Cannot find \";\" in the module definition.", 4);
}
static inline int Cba_PrsReadDesign( Cba_Prs_t * p )
{
while ( 1 )
{
int RetValue = Cba_PrsReadModule( p );
if ( RetValue == 0 ) // end of file
break;
if ( RetValue == 1 ) // successfully parsed
continue;
if ( RetValue == 2 ) // recognized as primitive
continue;
if ( RetValue == 3 ) // failed and skipped
continue;
if ( RetValue == 4 ) // error
return 0;
assert( 0 );
}
return 1;
}
/**Function*************************************************************
Synopsis []
Description []
SideEffects []
SeeAlso []
***********************************************************************/
void Cba_PrsPrintModules( Cba_Prs_t * p )
{
char * pName; int i;
printf( "Succeeded parsing %d models:\n", Vec_IntSize(&p->vSucceeded) );
Cba_PrsForEachModelVec( &p->vSucceeded, p, pName, i )
printf( " %s", pName );
printf( "\n" );
printf( "Skipped %d known models:\n", Vec_IntSize(&p->vKnown) );
Cba_PrsForEachModelVec( &p->vKnown, p, pName, i )
printf( " %s", pName );
printf( "\n" );
printf( "Skipped %d failed models:\n", Vec_IntSize(&p->vFailed) );
Cba_PrsForEachModelVec( &p->vFailed, p, pName, i )
printf( " %s", pName );
printf( "\n" );
}
/**Function*************************************************************
Synopsis []
Description []
SideEffects []
SeeAlso []
***********************************************************************/
Cba_Man_t * Cba_PrsReadVerilog( char * pFileName )
{
Cba_Man_t * pDesign = NULL;
Cba_Prs_t * p = Cba_PrsAlloc( pFileName );
if ( p == NULL )
return NULL;
Cba_PrsAddVerilogDirectives( p );
Cba_PrsReadDesign( p );
Cba_PrsPrintModules( p );
if ( Cba_PrsErrorPrint(p) )
ABC_SWAP( Cba_Man_t *, pDesign, p->pDesign );
Cba_PrsFree( p );
return pDesign;
}
void Cba_PrsReadVerilogTest( char * pFileName )
{
abctime clk = Abc_Clock();
extern void Cba_PrsWriteVerilog( char * pFileName, Cba_Man_t * pDes );
// Cba_Man_t * p = Cba_PrsReadVerilog( "c/hie/dump/1/netlist_1.v" );
// Cba_Man_t * p = Cba_PrsReadVerilog( "aga/me/me_wide.v" );
Cba_Man_t * p = Cba_PrsReadVerilog( "aga/ray/ray_wide.v" );
if ( !p ) return;
printf( "Finished reading %d networks. ", Cba_ManNtkNum(p) );
printf( "NameIDs = %d. ", Abc_NamObjNumMax(p->pNames) );
printf( "Memory = %.2f MB. ", 1.0*Cba_ManMemory(p)/(1<<20) );
Abc_PrintTime( 1, "Time", Abc_Clock() - clk );
// Abc_NamPrint( p->pDesign->pNames );
// Cba_PrsWriteVerilog( "c/hie/dump/1/netlist_1_out.v", p );
// Cba_PrsWriteVerilog( "aga/me/me_wide_out.v", p );
Cba_PrsWriteVerilog( "aga/ray/ray_wide_out.v", p );
Cba_ManFree( p );
}
////////////////////////////////////////////////////////////////////////
/// END OF FILE ///
////////////////////////////////////////////////////////////////////////
ABC_NAMESPACE_IMPL_END
|