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-rw-r--r--atahpt.c28
1 files changed, 12 insertions, 16 deletions
diff --git a/atahpt.c b/atahpt.c
index 620e8946..327d74bd 100644
--- a/atahpt.c
+++ b/atahpt.c
@@ -40,9 +40,19 @@ const struct dev_entry ata_hpt[] = {
};
static void atahpt_chip_writeb(const struct flashctx *flash, uint8_t val,
- chipaddr addr);
+ chipaddr addr)
+{
+ OUTL((uint32_t)addr, io_base_addr + BIOS_ROM_ADDR);
+ OUTB(val, io_base_addr + BIOS_ROM_DATA);
+}
+
static uint8_t atahpt_chip_readb(const struct flashctx *flash,
- const chipaddr addr);
+ const chipaddr addr)
+{
+ OUTL((uint32_t)addr, io_base_addr + BIOS_ROM_ADDR);
+ return INB(io_base_addr + BIOS_ROM_DATA);
+}
+
static const struct par_master par_master_atahpt = {
.chip_readb = atahpt_chip_readb,
.chip_readw = fallback_chip_readw,
@@ -80,20 +90,6 @@ int atahpt_init(void)
return 0;
}
-static void atahpt_chip_writeb(const struct flashctx *flash, uint8_t val,
- chipaddr addr)
-{
- OUTL((uint32_t)addr, io_base_addr + BIOS_ROM_ADDR);
- OUTB(val, io_base_addr + BIOS_ROM_DATA);
-}
-
-static uint8_t atahpt_chip_readb(const struct flashctx *flash,
- const chipaddr addr)
-{
- OUTL((uint32_t)addr, io_base_addr + BIOS_ROM_ADDR);
- return INB(io_base_addr + BIOS_ROM_DATA);
-}
-
#else
#error PCI port I/O access is not supported on this architecture yet.
#endif