| Commit message (Collapse) | Author | Age | Files | Lines |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
Projects using libflashrom like fwupd expect the user to wait for the
operation to complete. To avoid the user thinking the process has
"hung" or "got stuck" report back the progress complete of the erase,
write and read operations.
Add a new --progress flag to the CLI to report progress of operations.
Include a test for the dummy spi25 device.
TEST=./test_build.sh; ./flashrom -p lspcon_i2c_spi:bus=7 -r /dev/null --progress
Change-Id: I7197572bb7f19e3bdb2bde855d70a0f50fd3854c
Signed-off-by: Richard Hughes <richard@hughsie.com>
Signed-off-by: Daniel Campello <campello@chromium.org>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/49643
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>
Reviewed-by: Anastasia Klimchuk <aklm@chromium.org>
Reviewed-by: Thomas Heijligen <src@posteo.de>
|
|
|
|
|
|
|
|
|
|
|
| |
Mostly by changing to `unsigned` types where applicable, sometimes
`signed` types, and casting as a last resort.
Change-Id: I08895543ffb7a48058bcf91ef6500ca113f2d305
Signed-off-by: Nico Huber <nico.h@gmx.de>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/30409
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Jacob Garber <jgarber1@ualberta.ca>
|
|
|
|
|
|
|
|
| |
Change-Id: I7bfc339673cbf5ee2d2ff7564c4db04ca088d0a4
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/25381
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
Some Parallel bus chips have a 16-bit mode and an 8-bit mode. They use
normal JEDEC addresses for 16-bit mode and shifted addresses (by 1 bit)
for 8-bit mode. Some programmers can access them in 16-bit mode, but on
all flashrom-supported programmers so far, we access them in 8-bit mode.
This means we have to shift the addresses but apart from the addresses
we can share the code.
This patch makes this possible by checking the chip's FEATURE_ADDR_SHIFTED
flag in common JEDEC functions and applying the right addresses respectively.
Corresponding to flashrom svn r1840.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
This patch combines two identical block and chip erase functions respectively:
- Merge block_erase_m29f400bt and block_erase_en29lv640b into
erase_block_shifted_jedec.
- Merge block_erase_chip_m29f400bt and block_erase_chip_en29lv640b into
erase_chip_block_shifted_jedec.
Leave their implementations in en29lv640b.c for now.
Corresponding to flashrom svn r1808.
Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
|
|
|
|
|
|
|
|
|
|
| |
Corresponding to flashrom svn r1789.
Inspired by and mostly based on a patch
Signed-off-by: Mark Marshall <mark.marshall@omicron.at>
Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
|
|
|
|
|
|
|
|
|
|
|
|
| |
All the driver conversion work and cleanup has been done by Stefan.
flashrom.c and cli_classic.c are a joint work of Stefan and Carl-Daniel.
Corresponding to flashrom svn r1579.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
|
|
This chip needs special command sequences in 8 bit mode. Also, 8 bit
programming needs actually 16bit double byte program.
The chip is found on the Bifferos Bifferboard, for example.
Corresponding to flashrom svn r1521.
Signed-off-by: Rudolf Marek <r.marek@assembler.cz>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
|