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* Add support for Amic Technology A29040B flash chipPeter Stuge2008-06-111-0/+1
| | | | | | | | | PROBE READ tested by Lyos Gemini Norezel on BioStar P4M80-M4. Corresponding to flashrom svn r257 and coreboot v2 svn r3365. Signed-off-by: Peter Stuge <peter@stuge.se> Acked-by: Lyos Gemini Norezel <lyos.gemininorezel@gmail.com>
* Mark SST SST49LF160C as fully supported.:Peter Stuge2008-06-031-1/+1
| | | | | | | | | | | | | | SST SST49LF160C is confirmed to work for PROBE READ ERASE WRITE, at least on 2 MCP55-based boards (gigabyte m57sli v1 and supermicro h8dmr). On the m57sli board, it only works > 512K when booted into coreboot; the proprietary bios seems to do something weird where it locks rom access down to the first 512K of the chip. Corresponding to flashrom svn r255 and coreboot v2 svn r3360. Signed-off-by: Peter Stuge <peter@stuge.se> Acked-by: Peter Stuge <peter@stuge.se>
* Revert r3357 and fix it as intended to (forgotten header commit instead of typo)Mart Raudsepp2008-05-271-1/+1
| | | | | | | Corresponding to flashrom svn r254 and coreboot v2 svn r3358. Signed-off-by: Mart Raudsepp <mart.raudsepp@artecdesign.ee> Acked-by: Mart Raudsepp <mart.raudsepp@artecdesign.ee>
* Fix typo introduced in r3356 that breaks buildMart Raudsepp2008-05-271-1/+1
| | | | | | | Corresponding to flashrom svn r253 and coreboot v2 svn r3357. Signed-off-by: Mart Raudsepp <mart.raudsepp@artecdesign.ee> Acked-by: Mart Raudsepp <mart.raudsepp@artecdesign.ee>
* MX25L4005, S25FL016A, W39V040B, W39V080A, SST49LF008A testsPeter Stuge2008-05-271-5/+5
| | | | | | | | | | | | | I have tested MX25L4005, S25FL016A and W39V080A myself. Thanks also to the following testers: SST49LF008A Bernhard M. Wiedemann W39V040B Dan Lenski Corresponding to flashrom svn r252 and coreboot v2 svn r3356. Signed-off-by: Peter Stuge <peter@stuge.se> Acked-by: Peter Stuge <peter@stuge.se>
* Mark SST49LF004A/B as testedMart Raudsepp2008-05-271-1/+1
| | | | | | | | | | Tested by me on actual hardware (all operations) - Artec Group DBE62 with SST 49LF004B Corresponding to flashrom svn r251 and coreboot v2 svn r3350. Signed-off-by: Mart Raudsepp <mart.raudsepp@artecdesign.ee> Acked-by: Mart Raudsepp <mart.raudsepp@artecdesign.ee>
* Mark the following chips as testedUwe Hermann2008-05-261-5/+5
| | | | | | | | | | | | | | | - AMD Am29F040B - SST SST39SF020A - Winbond W29C020C - Winbond W29EE011 - Winbond W49F002U All of them tested by me on actual hardware (all operations). Corresponding to flashrom svn r250 and coreboot v2 svn r3349. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
* Mark more chips as tested (all operations), tested on ASUS P4B266Uwe Hermann2008-05-221-3/+3
| | | | | | | Corresponding to flashrom svn r248 and coreboot v2 svn r3347. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
* Add support for Amic A25L40P SPI flashRudolf Marek2008-05-221-0/+1
| | | | | | | Corresponding to flashrom svn r246 and coreboot v2 svn r3345. Signed-off-by: Rudolf Marek <r.marek@assembler.cz> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* Myles reported SST49LF080A status -> TESTED_PREWPeter Stuge2008-05-211-1/+1
| | | | | | | Corresponding to flashrom svn r244 and coreboot v2 svn r3341. Signed-off-by: Peter Stuge <peter@stuge.se> Acked-by: Peter Stuge <peter@stuge.se>
* Support Pm49FL004/2 Block Locking RegistersNikolay Petukhov2008-05-171-2/+2
| | | | | | | | | | | | | | | | | | The PMC chips understand both LPC and FWH flash commands. When in FWH mode (MSR_DIVIL_BALL_OPT(0x51400015) = 0x00000f7d on 5536 boards) the Block Locking Registers by default lock the flash chip for write and erase - in addition to any chipset write protection. This patch adds unlock operations before Pm49FL004/2 write and erase, and it includes an svn mv pm49fl004.c pm49fl00x.c Thanks go to Nikolay for this patch. Corresponding to flashrom svn r243 and coreboot v2 svn r3332. Signed-off-by: Nikolay Petukhov <nikolay.petukhov@gmail.com> Signed-off-by: Peter Stuge <peter@stuge.se> Acked-by: Bari Ari <bari@onelabs.com>
* Add support for the Atmel AT25DF321 SPI flash (tested)Dominik Geyer2008-05-161-1/+2
| | | | | | | | | Change ST M25P32 status to tested. Corresponding to flashrom svn r240 and coreboot v2 svn r3326. Signed-off-by: Dominik Geyer <dominik.geyer@kontron.com> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* Lots of new SST flash chip IDsCarl-Daniel Hailfinger2008-05-151-0/+3
| | | | | | | | | | Only a subset has been added to flashchips.c, but the IDs in flash.h will make lookups easier if anybody wants to add support for them. Corresponding to flashrom svn r236 and coreboot v2 svn r3321. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* Add support for the JEDEC RESCarl-Daniel Hailfinger2008-05-151-31/+32
| | | | | | | | | | | | | | | | | | Add support for the JEDEC RES (Read Electronic Signature and Resume from Powerdown) SPI command to identify older SPI chips which can't handle JEDEC RDID. Since RES gives a one-byte identifier which is shared among many different vendors and even different sizes, we want to match RES as a last resort if RDID returns 0xff 0xff 0xff. Corresponding to flashrom svn r235 and coreboot v2 svn r3320. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Peter Stuge <peter@stuge.se> This is a heavily reworked version of a patch by Fredrik Tolf, which was Signed-off-by: Fredrik Tolf <fredrik@dolda2000.com>
* Fix crash caused by division by zero for unknown flash chipsCarl-Daniel Hailfinger2008-05-141-5/+5
| | | | | | | Corresponding to flashrom svn r232 and coreboot v2 svn r3309. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* Add lots of ATMEL SPI flash chips to flash.hCarl-Daniel Hailfinger2008-05-141-5/+6
| | | | | | | | | Add a few flashchips already mentioned in flash.h to flashchips.c Corresponding to flashrom svn r230 and coreboot v2 svn r3306. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* MX25L3205 and W25x40 have been confirmed to probe/read/erase/write OK by ↵Carl-Daniel Hailfinger2008-05-121-3/+3
| | | | | | | | | | | Harald Gutmann SST39VF040 has been confirmed to probe OK by misi e. Corresponding to flashrom svn r226 and coreboot v2 svn r3300. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* Add SST39VF512, SST39VF010, SST39VF040 supportCarl-Daniel Hailfinger2008-05-121-0/+3
| | | | | | | | | | The SST39LF series has the same IDs. Add short AMIC vendor ID to flashrom. Corresponding to flashrom svn r225 and coreboot v2 svn r3299. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Peter Stuge <peter@stuge.se>
* Rename generic_spi_*() functions to spi_*()Peter Stuge2008-05-101-25/+25
| | | | | | | | | This is a very early step toward cleaning up SPI code in flashrom. Corresponding to flashrom svn r223 and coreboot v2 svn r3295. Signed-off-by: Peter Stuge <peter@stuge.se> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* Add a tested bitmap field to the flash chip tablePeter Stuge2008-05-031-101/+101
| | | | | | | | | | | | | | | Two bits indicate OK and BAD for each operation PROBE READ ERASE WRITE. 8 bits out of 32 are in use now. No bits set means nothing has been tested. For chips with at least one operation that is not tested or not working, the user is asked to email a report to a special email adress so that the table can be updated. All chips are TEST_UNTESTED for now. Corresponding to flashrom svn r221 and coreboot v2 svn r3277. Signed-off-by: Peter Stuge <peter@stuge.se> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* Separate ST M50FLW support from generic JEDEC codeClaus Gindhart2008-04-281-4/+4
| | | | | | | | | | | | | | | | The generic jedec.c does not work for the ST M50FLW flash devices, because they need an unlock command first. For this reason, ST M50FLW support is moved to a new HW support module, because any change in jedec.c would bear the risk to cause problems with the already supported devices. It's already tested with ST M50FLW080A; the other chips of this family i dont have available, so i couldnt test it. Corresponding to flashrom svn r219 and coreboot v2 svn r3274. Signed-off-by: Claus Gindhart <claus.gindhart@kontron.com> Acked-by: Stefan Reinauer <stepan@coresystems.de>
* ST M50FW016 and ST M50FW040 support the 82802ab command set, not jedecEd Swierk2008-04-071-2/+2
| | | | | | | Corresponding to flashrom svn r216 and coreboot v2 svn r3221. Signed-off-by: Ed Swierk <eswierk@arastra.com> Acked-by: Joseph Smith <joe@smittys.pointclark.net>
* Support for the Winbond W39V080FA series of chipsStefan Reinauer2008-03-171-0/+2
| | | | | | | | | Support for flashing on the Kontron 986LCD-M board. Corresponding to flashrom svn r213 and coreboot v2 svn r3165. Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* Sort list of flash chips alphabetically, add commentUwe Hermann2008-03-161-60/+68
| | | | | | | Corresponding to flashrom svn r211 and coreboot v2 svn r3152. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
* Re-add code erroneously removed in r3140Uwe Hermann2008-03-141-194/+99
| | | | | | | Corresponding to flashrom svn r209 and coreboot v2 svn r3146. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
* Changes M50FW080 to use 82802ab.c instead of jedec.cJoseph Smith2008-03-141-1/+1
| | | | | | | | | This fixes the problem of not being able to erase the chip. Corresponding to flashrom svn r208 and coreboot v2 svn r3145. Signed-off-by: Joseph Smith <joe@smittys.pointclark.net> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* Fix up one forgotten revert in r3140Carl-Daniel Hailfinger2008-03-141-2/+2
| | | | | | | Corresponding to flashrom svn r205 and coreboot v2 svn r3141. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* Revert the delete of 82802ab.c in r3137Carl-Daniel Hailfinger2008-03-141-99/+194
| | | | | | | Corresponding to flashrom svn r204 and coreboot v2 svn r3140. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* Also print the chip vendor name in --list-supported outputUwe Hermann2008-03-131-194/+99
| | | | | | | | | | | | Cosmetic changes in some files, partly bending the 80-characters-per-line rule in this special case, as the 80-character-limited version looks equally crappy even in an 80x25 console/xterm, so let's make it at least look good in a high-resolution xterm. Corresponding to flashrom svn r203 and coreboot v2 svn r3139. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
* Drop 82802ab.c as it is identical to sharplhf00l04.cCarl-Daniel Hailfinger2008-03-131-4/+4
| | | | | | | Corresponding to flashrom svn r201 and coreboot v2 svn r3137. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Peter Stuge <peter@stuge.se>
* Handle JEDEC JEP106W continuation codes in SPI RDIDCarl-Daniel Hailfinger2008-02-061-2/+16
| | | | | | | | | | | | | Some vendors like Programmable Micro Corp (PMC) need this. Both the serial and parallel flash JEDEC detection routines would benefit from a parity/sanity check of the vendor ID. Will do this later. Add support for the PMC Pm25LV family of SPI flash chips. Corresponding to flashrom svn r191 and coreboot v2 svn r3091. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Chris Lingard <chris@stockwith.co.uk>
* Add ids and chip entry for Spansion S25FL016A, tested, workingPeter Stuge2008-01-251-0/+2
| | | | | | | Corresponding to flashrom svn r187 and coreboot v2 svn r3074. Signed-off-by: Peter Stuge <peter@stuge.se> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* Here is just a little and simple patch to get the MX25L3205D workingHarald Gutmann2008-01-221-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | I've tested and verified the chip myself, and it seems to work everything like supposted, since Carl-Daniel has patched flashrom to use the read funktion on verifying. "benchvice flashrom # ./flashrom -m gigabyte:m57sli -v test.4mb Calibrating delay loop... OK. No coreboot table found. Found chipset "NVIDIA MCP55", enabling flash write... OK. Found board "GIGABYTE GA-M57SLI-S4": enabling flash write... Serial flash segment 0xfffe0000-0xffffffff enabled Serial flash segment 0x000e0000-0x000fffff enabled Serial flash segment 0xffee0000-0xffefffff disabled Serial flash segment 0xfff80000-0xfffeffff enabled LPC write to serial flash enabled serial flash pin 29 OK. MX25L3205 found at physical address 0xffc00000. Flash part is MX25L3205 (4096 KB). Flash image seems to be a legacy BIOS. Disabling checks. Verifying flash... VERIFIED. benchvice flashrom # ls -l test.4mb -rw-r--r-- 1 root root 4194304 22. Jan 16:27 test.4mb Corresponding to flashrom svn r186 and coreboot v2 svn r3072. Signed-off-by: Harald Gutmann <harald.gutmann@gmx.net> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* Further abstract SPI functions to allow chips bigger than 512 kB behind IT8716FsRonald Hoogenboom2008-01-191-13/+21
| | | | | | | | | | | Support SPI flash chips bigger than 512 kByte sitting behind IT8716F Super I/O performing LPC-to-SPI flash translation. Corresponding to flashrom svn r181 and coreboot v2 svn r3061. Signed-off-by: Ronald Hoogenboom <hoogenboom30@zonnet.nl> Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* Rename LinuxBIOS to corebootStefan Reinauer2008-01-181-2/+2
| | | | | | | Corresponding to flashrom svn r178 and coreboot v2 svn r3054. Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de>
* Enable MX25L8005 supportHarald Gutmann2008-01-101-0/+2
| | | | | | | | | The #defines were already there. Corresponding to flashrom svn r176 and coreboot v2 svn r3042. Signed-off-by: Harald Gutmann <harald.gutmann@gmx.net> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* Add support for the SST25VF040B 4 Mbit SPI flash chipCarl-Daniel Hailfinger2008-01-071-0/+2
| | | | | | | | | Straight from the data sheet, not tested. Corresponding to flashrom svn r175 and coreboot v2 svn r3036. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Stefan Reinauer <stepan@coresystems.de>
* Print at least the vendor for SPI flash chips if the exact chip ID is unknownCarl-Daniel Hailfinger2008-01-041-0/+8
| | | | | | | Corresponding to flashrom svn r173 and coreboot v2 svn r3032. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Ronald G. Minnich <rminnich@gmail.com>
* Unfortunately, EN29F002T, EN29F002AT, EN29F002ANT, EN29F002NT all have ↵Carl-Daniel Hailfinger2007-12-311-2/+3
| | | | | | | | | | | | | exactly the same ID Improve model number printing. Add EN29F002(A)(N)B support while I'm at it. Corresponding to flashrom svn r172 and coreboot v2 svn r3031. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Markus Boas <bios@ryven.de>
* Add continuation ID support to jedec.cCarl-Daniel Hailfinger2007-12-311-0/+3
| | | | | | | | | | | | | | | | | | | | | | | The continuation ID code does not go further than checking for IDs of the type 0x7fXX, but does this for vendor and product ID. The current published JEDEC spec has a list where the largest vendor ID is 7 bytes long, but all leading bytes are 0x7f. The list will grow in the future, and using a 64bit variable will not be enough anymore. Besides that, it seems that the location of the ID byte after the first continuation ID byte is very vendor specific, so we may have to revisit that code some time in the future. (Suggestion for a new encoding: Use a two-byte data type for the ID, the lower byte contains the only non-0x7f byte, the upper byte contains the number of 0x7f bytes used as prefix, which is the bank number minus 1 the vendor ID appears in.) Add support for EON EN29F002AT. Corresponding to flashrom svn r171 and coreboot v2 svn r3030. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Corey Osgood <corey.osgood@gmail.com>
* Refine various vendor ID annotationsCarl-Daniel Hailfinger2007-12-311-1/+1
| | | | | | | | | | | | | | This fixes a few vendor IDs to conform with JEDEC publication 106W (JEP106W), adds some device IDs and provides information about non-conforming IDs. The EON change is left to the patch adding EON chips. This patch should have no effect on code generation. Corresponding to flashrom svn r170 and coreboot v2 svn r3029. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Corey Osgood <corey.osgood@gmail.com>
* All SPI chips mentioned in flashchips.c had their sector size listed as page ↵Carl-Daniel Hailfinger2007-12-291-10/+10
| | | | | | | | | | | | | size Fix that. Page size is uniform 256 bytes for SPI. A sector/block size field in struct flashchip would be nice, though. Corresponding to flashrom svn r169 and coreboot v2 svn r3027. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Corey Osgood <corey.osgood@gmail.com>
* Add 25VF016B supportCarl-Daniel Hailfinger2007-12-291-0/+2
| | | | | | | | | Untested, but verified against the data sheet. Corresponding to flashrom svn r167 and coreboot v2 svn r3025. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Corey Osgood <corey.osgood@gmail.com>
* Add support for various ST M25P* chipsCarl-Daniel Hailfinger2007-12-171-0/+16
| | | | | | | | | | | | | Add support for ST M25P05-A, M25P10-A, M25P20, M25P40, M25P16, M25P32, M25P64, M25P128. ST M25P80 support is already there. Not tested, but conforming to data sheets and double checked. Corresponding to flashrom svn r166 and coreboot v2 svn r3012. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
* Rename SPI erase functions to include opcodeCarl-Daniel Hailfinger2007-12-171-2/+2
| | | | | | | | | | | | | | | To make it easier to add new SPI chips to flashchips.c, rename functions with multiple possible opcodes from linear numbering at the end (_1, _2) to include the opcode at the end (_60, _c7). That way, you only have to take a short look at the data sheet and choose the right function by appending the opcode listed in the data sheet. No functional changes. Corresponding to flashrom svn r165 and coreboot v2 svn r3009. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Ward Vandewege <ward@gnu.org>
* Add support for ST M25P80 chipsCarl-Daniel Hailfinger2007-12-161-0/+2
| | | | | | | | | | Detection was tested. Print status register before erase to help debugging block locks. Corresponding to flashrom svn r164 and coreboot v2 svn r3008. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Corey Osgood <corey.osgood@gmail.com>
* Add support for more atmel chipsFrederico Silva2007-12-101-0/+4
| | | | | | | | | | | | | | | AT49F002 AT49F002N AT49F002T AT49F002NT Only tested the read function on AT49F002T. datasheet @ http://www.atmel.com/atmel/acrobat/doc1017.pdf Corresponding to flashrom svn r163 and coreboot v2 svn r3003. Signed-off-by: Frederico Silva <frederico.silva@gmail.com> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* Add support for Intel 440MX and Fujitsu MBM29F400TCUwe Hermann2007-10-301-0/+2
| | | | | | | | | Detection and reading works, writing is not tested. Corresponding to flashrom svn r158 and coreboot v2 svn r2903. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Peter Stuge <peter@stuge.se>
* Add Am29LV040BPeter Lemenkov2007-10-251-0/+2
| | | | | | | | | | | | | Looking through the sources of Uniflash utility I found that this chip is no more no less than low-voltage variant of Am29F040B but with different ID. So I created a very quick patch (attached). Corresponding to flashrom svn r157 and coreboot v2 svn r2897. Signed-off-by: Peter Lemenkov <lemenkov@gmail.com> Acked-by: Peter Stuge <peter@stuge.se>
* Introduce block and sector erase routines, but do not use them yetCarl-Daniel Hailfinger2007-10-221-1/+1
| | | | | | | Corresponding to flashrom svn r155 and coreboot v2 svn r2881. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Stefan Reinauer <stepan@coresystems.de>
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