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* hwaccess: replace flashrom specific macros by compiler definesThomas Heijligen2021-10-151-1/+0
| | | | | | | | | | Replace the remaining IS_* macros with the associated compiler defines Change-Id: Ia0f022d12390722816066d292e1878824adc613c Signed-off-by: Thomas Heijligen <thomas.heijligen@secunet.de> Reviewed-on: https://review.coreboot.org/c/flashrom/+/58280 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
* internal.c: unify the macro for x86 only codeThomas Heijligen2021-09-291-7/+7
| | | | | | | | | | | | | | The #if defined(__i386__) || defined(__x86_64__) guard is commonly used for x86 only code across flashrom. Only platform.h and hwaccess.* use the IS_X86 macro. Change-Id: I94a599431f58666189c8cd601286e9b30c8bf62b Signed-off-by: Thomas Heijligen <thomas.heijligen@secunet.de> Reviewed-on: https://review.coreboot.org/c/flashrom/+/57942 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Felix Singer <felixsinger@posteo.net> Reviewed-by: Nico Huber <nico.h@gmx.de> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* programmer_table: move each entry to the associated programmer sourceThomas Heijligen2021-06-101-1/+11
| | | | | | | | | Change-Id: I3d02bd789f0299e936eb86819b3b15b5ea2bb921 Signed-off-by: Thomas Heijligen <thomas.heijligen@secunet.de> Reviewed-on: https://review.coreboot.org/c/flashrom/+/52946 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Anastasia Klimchuk <aklm@chromium.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
* programmer: Smoothen register_par_master APIAnastasia Klimchuk2021-05-231-1/+1
| | | | | | | | | | | | | | | It was impossible to register a const struct par_master that would point to dynamically allocated `data`. Fix that so that we won't have to create more mutable globals. BUG=b:185191942 TEST=builds Change-Id: I95bc92f6c54c5bcdac1c522ca87054aaffed0f40 Signed-off-by: Anastasia Klimchuk <aklm@chromium.org> Reviewed-on: https://review.coreboot.org/c/flashrom/+/54169 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>
* Add missing platform.h includesMiriam Polzer2020-12-261-0/+1
| | | | | | | | | | | | | | | Include platform.h in all files using its macros. BUG=none TEST=builds Signed-off-by: Miriam Polzer <mpolzer@google.com> Change-Id: If17a3d58c02222f61b4e0335879eeed1638b583c Reviewed-on: https://review.coreboot.org/c/flashrom/+/48880 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Idwer Vollering <vidwer@gmail.com> Reviewed-by: David Hendricks <david.hendricks@gmail.com> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
* internal.c: De-maze the pre-processor wraps a littleEdward O'Callaghan2020-10-281-5/+3
| | | | | | | | | | | | | | | This makes it again easier to parse internal.c by consolidating some processor wraps and labeling the ends of others. BUG=none BRANCH=none TEST=builds Change-Id: I32fb1a3fff7afa671f08fb2cc2ad406772f5e10f Signed-off-by: Edward O'Callaghan <quasisec@google.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/46815 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* internal.c: Co-locate global variables to top of fileEdward O'Callaghan2020-10-271-8/+8
| | | | | | | | | | | | | | | This just makes internal.c at bit easier to parse and helps the read get a view of all the singleton state in one go. BUG=none BRANCH=none TEST=builds Change-Id: Id4109dfb17f63d80fb3fb3f2a1d0ab54d9eddc6e Signed-off-by: Edward O'Callaghan <quasisec@google.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/46814 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
* internal.c: Reshuffle functions to avoid forward declsEdward O'Callaghan2020-10-271-50/+36
| | | | | | | | | | | | | | | This just makes internal.c a little easier to parse and avoids some fn prototypes on the mental stack. BUG=none BRANCH=none TEST=builds Change-Id: I693e30068e6a53b5fc161d895af451540650a8fe Signed-off-by: Edward O'Callaghan <quasisec@google.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/46813 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* internal: Fix board vendor and model memory leaksJacob Garber2019-09-241-15/+32
| | | | | | | | | | | | | The board vendor and model are sometimes specified as arguments during an internal flash, so make sure they are freed at the end of initialization. Change-Id: I9f43708f3b075896be67acec114bc6f390f8c6ca Signed-off-by: Jacob Garber <jgarber1@ualberta.ca> Found-by: Coverity CID 1230664, 1230665 Reviewed-on: https://review.coreboot.org/c/flashrom/+/34846 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: David Hendricks <david.hendricks@gmail.com>
* tree: Remove unused functions with no prototypesJacob Garber2019-06-231-11/+0
| | | | | | | | | | | | | | | | | These functions are no longer used, or were never used in the first place. generate_testpattern() - Introduced in commit eaac68bf8b, never used list_programmers() - Introduced in commit 552420b0d6, never used pci_dev_find_filter() - Prototype removed in commit 5c316f9549 erase_chip_jedec() - Usage and prototype removed in commit f52f784bb3 printlock_regspace2_blocks() - Introduced in commit ef3ac8ac17, never used spi_write_status_enable() - Usage dropped in commit fcbdbbc0d4 Change-Id: I742164670521fea65ffa3808446594848ce63cec Signed-off-by: Jacob Garber <jgarber1@ualberta.ca> Reviewed-on: https://review.coreboot.org/c/flashrom/+/33669 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
* Rework internal bus handling and laptop bail-outNico Huber2019-06-061-31/+39
| | | | | | | | | | | | | | | | | | | | | | We used to bail out on any unknown laptop. However, modern systems with SPI flashes don't suffer from the original problem. Even if a flash chip is shared with the EC, the latter has to expect the host to send regular JEDEC SPI commands any time. So instead of bailing out, we limit the set of buses to probe. If we suspect to be running on a laptop, we only allow probing of SPI and opaque programmers. The user can still use the existing force options to probe all buses. This will obsolete some board-enables that could be moved to `print.c` in follow-up commits. Change-Id: I1dbda8cf0c10d7786106f14f0d18c3dcce35f0a3 Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/c/flashrom/+/28716 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Thomas Heijligen <src@posteo.de>
* linux_mtd: Import driver from ChromiumOSDavid Hendricks2018-05-171-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This imports a series of patches from chromiumos for MTD support. The patches are squashed to ease review and original Change-Ids have been removed to avoid confusing Gerrit. There are a few changes to integrate the code: - Conflict resolution - Makefile changes - Remove file library usage from linux_mtd. We may revisit this and use it for other Linux interfaces later on. - Switch to using file stream functions for reads and writes. This consolidated patch is Signed-off-by: David Hendricks <dhendricks@fb.com> The first commit's message is: Initial MTD support This adds MTD support to flashrom so that we can read, erase, and write content on a NOR flash chip via MTD. BUG=chrome-os-partner:40208 BRANCH=none TEST=read, write, and erase works on Oak Signed-off-by: David Hendricks <dhendrix@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/272983 Reviewed-by: Shawn N <shawnn@chromium.org> This is the 2nd commit message: linux_mtd: Fix compilation errors This fixes compilation errors from the initial import patch. Signed-off-by: David Hendricks <dhendricks@fb.com> This is the 3rd commit message: linux_mtd: Suppress message if NOR device not found This just suppresses a message that might cause confusion for unsuspecting users. BUG=none BRANCH=none TEST=ran on veyron_mickey, "NOR type device not found" message no longer appears under normal circumstances. Signed-off-by: David Hendricks <dhendrix@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/302145 Commit-Ready: David Hendricks <dhendrix@chromium.org> Tested-by: David Hendricks <dhendrix@chromium.org> Reviewed-by: Shawn N <shawnn@chromium.org> This is the 4th commit message: linux_mtd: Support for NO_ERASE type devices Some mtd devices have the MTD_NO_ERASE flag set. This means these devices don't require an erase to write and might not have implemented an erase function. We should be conservative and skip erasing altogether, falling back to performing writes over the whole flash. BUG=b:35104688 TESTED=Zaius flash is now written correctly for the 0xff regions. Signed-off-by: William A. Kennington III <wak@google.com> Reviewed-on: https://chromium-review.googlesource.com/472128 Commit-Ready: William Kennington <wak@google.com> Tested-by: William Kennington <wak@google.com> Reviewed-by: Brian Norris <briannorris@chromium.org> This is the 5th commit message: linux_mtd: do reads in eraseblock-sized chunks It's probably not the best idea to try to do an 8MB read in one syscall. Theoretically, this should work; but MTD just relies on the SPI driver to deliver the whole read in one transfer, and many SPI drivers haven't been tested well with large transfer sizes. I'd consider this a workaround, but it's still good to have IMO. BUG=chrome-os-partner:53215 TEST=boot kevin; `flashrom --read ...` TEST=check for performance regression on oak BRANCH=none Signed-off-by: Brian Norris <briannorris@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/344006 Reviewed-by: David Hendricks <dhendrix@chromium.org> This is the 6th commit message: linux_mtd: make read/write loop chunks consistent, and documented Theoretically, there should be no maximum size for the read() and write() syscalls on an MTD (well, except for the size of the entire device). But practical concerns (i.e., bugs) have meant we don't quite do this. For reads: Bug https://b/35573113 shows that some SPI-based MTD drivers don't yet handle very large transactions. So we artificially limit this to block-sized chunks. For writes: It's not clear there is a hard limit. Some drivers will already split large writes into smaller chunks automatically. Others don't do any splitting. At any rate, using *small* chunks can actually be a problem for some devices (b:35104688), as they get worse performance (doing an internal read/modify/write). This could be fixed in other ways by advertizing their true "write chunk size" to user space somehow, but this isn't so easy. As a simpler fix, we can just increase the loop increment to match the read loop. Per David, the original implementation (looping over page chunks) was just being paranoid. So this patch: * clarifies comments in linux_mtd_read(), to note that the chunking is somewhat of a hack that ideally can be fixed (with bug reference) * simplifies the linux_mtd_write() looping to match the structure in linux_mtd_read(), including dropping several unnecessary seeks, and correcting the error messages (they referred to "reads" and had the wrong parameters) * change linux_mtd_write() to align its chunks to eraseblocks, not page sizes Note that the "->page_size" parameter is still somewhat ill-defined, and only set by the upper layers for "opaque" flash. And it's not actually used in this driver now. If we could figure out what we really want to use it for, then we could try to set it appropriately. BRANCH=none BUG=b:35104688 TEST=various flashrom tests on Kevin TEST=Reading and writing to flash works on our zaius machines over mtd Change-Id: I3d6bb282863a5cf69909e28a1fc752b35f1b9599 Signed-off-by: Brian Norris <briannorris@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/505409 Reviewed-by: David Hendricks <dhendrix@chromium.org> Reviewed-by: Martin Roth <martinroth@chromium.org> Reviewed-by: William Kennington <wak@google.com> Reviewed-on: https://review.coreboot.org/25706 Tested-by: David Hendricks <david.hendricks@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de> Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com>
* Remove address from GPLv2 headersElyes HAOUAS2018-04-241-4/+0
| | | | | | | | Change-Id: I7bfc339673cbf5ee2d2ff7564c4db04ca088d0a4 Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/25381 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
* internal: Only build on x86 and mipselNico Huber2017-12-191-33/+3
| | | | | | | | | | | | | internal_init() explicitly fails on everything but x86 and mipsel. Instead, we can just never build the internal programmer on other architectures and drop a lot of #if boilerplate. Change-Id: I672ddab0415df3baa49ff39a1c9db1b41d8143a4 Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/22671 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: David Hendricks <david.hendricks@gmail.com> Reviewed-by: Patrick Rudolph <siro@das-labor.org>
* internal: Fix warnings about unused constantsNico Huber2017-12-091-0/+4
| | | | | | | | | | | | By adding more #if guards, fix warnings about unused constants that are enabled by default in newer GCC versions. Change-Id: Ib3b6d7c0c2fadc4faeab971673bfadb1a6d25919 Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/22669 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: David Hendricks <david.hendricks@gmail.com> Reviewed-by: Patrick Rudolph <siro@das-labor.org>
* Pimp the manpage to create nicer hyperlinks and HTML outputStefan Tauner2016-01-141-1/+1
| | | | | | | | | | Also, add a target to the makefile to build a flashrom.8.html with groff. To fix some formatting issues this adds some indention commands as well. Corresponding to flashrom svn r1913. Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* Unify target OS and CPU architecture checksStefan Tauner2015-01-101-8/+8
| | | | | | | | | | | | | | | | | | | | | | We do CPU architecture checks once for the makefile in arch.h and once for HW access abstraction in hwaccess.c. This patch unifies related files so that they can share the checks to improve maintainability and reduce the chance of inconsistencies. Furthermore, it refines some of the definitions, which - adds "support" for AARCH64 and PPC64, - adds big-endian handling on arm as well as LE handling on PPC64, - fixes compilation of internal.c on AARCH64 and PPC64. Additionally, this patch continues to unify all OS checks in flashrom by adding a new helper macro IS_WINDOWS. The old header file for architecture checking is renamed to platform.h to reflect its broader scope and all new macros are add in there. Corresponding to flashrom svn r1864. Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at> Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
* Introduce generic shutdown_free() and remove redundant internal_shutdown()Stefan Tauner2014-08-311-7/+0
| | | | | | | | | The former will be useful in cases where cleanup equals a simple call to free(). Corresponding to flashrom svn r1848. Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at> Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
* Rename programmer registration functionsCarl-Daniel Hailfinger2014-07-191-2/+2
| | | | | | | | | | | | Register_programmer suggests that we register a programmer. However, that function registers a master for a given bus type, and a programmer may support multiple masters (e.g. SPI, FWH). Rename a few other functions to be more consistent. Corresponding to flashrom svn r1831. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
* IT87: Add ability to select between chips on GIGABYTE DualBIOS boardsVadim Girlin2013-08-241-3/+2
| | | | | | | | | | | | | | | Thanks to Vadim Girlin for finding out how to do that. This is known to work on GA-MA770-UD3, GA-B75M-D3V, GA-B75N and GA-H61M-S1 (only M_BIOS is populated). Corresponding to flashrom svn r1720. Signed-off-by: Vadim Girlin <vadimgirlin@gmail.com> Signed-off-by: Damien Zammit <damien@zamaudio.com> Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at> Tested-by: Damien Zammit <damien@zamaudio.com> Tested-by: Anton Kochkov <anton.kochkov@gmail.com> Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
* Various cross-platform fixesCarl-Daniel Hailfinger2013-07-131-1/+5
| | | | | | | | | | | | | | | | | | | | | | | Improve compilation with libpayload (compiling flashrom.c and linking is still broken): - disable Ponyprog (which enforced serial.c compilation) - make errno available where it is needed Fix internal.c for non-x86 and enable cb parsing on ARM. Fix mingw builds by using its __USE_MINGW_ANSI_STDIO macro and gnu_printf definition for printf format style checking. See http://sourceforge.net/apps/trac/mingw-w64/wiki/gnu%20printf This requires inclusion of stdio.h in flash.h. Fix order of libraries in the Makefile: FEATURE_LIBS needs to come *after* PCILIBS in case ZLIB is needed by it. Corresponding to flashrom svn r1697. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* Add a bunch of new/tested stuff and various small changes 17Stefan Tauner2013-02-221-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Tested Mainboards: OK: - Acer V75-M (used in IBM Aptiva 2170-G) http://www.flashrom.org/pipermail/flashrom/2012-December/010300.html - Acorp 6M810C http://www.flashrom.org/pipermail/flashrom/2013-January/010433.html - ASRock G31M-S rev 2.0 http://www.flashrom.org/pipermail/flashrom/2013-February/010538.html - ASUS F1A75-V PRO http://paste.flashrom.org/view.php?id=1528 - ASUS M5A97 (rev. 1.0) http://www.flashrom.org/pipermail/flashrom/2013-February/010483.html - ASUS P5KPL-AM IN/GB http://www.flashrom.org/pipermail/flashrom/2013-January/010455.html - GABYTE GA-H77M-D3H http://www.flashrom.org/pipermail/flashrom/2013-February/010538.html NOT OK: - GIGABYTE GA-Z77MX-D3H http://paste.flashrom.org/view.php?id=1529 http://paste.flashrom.org/view.php?id=1530 Tested flash chips: - Winbond W25X10 to PREW (+PREW) Reported on IRC(?) - Eon EN25Q32(A/B) to PREW (+REW) http://www.flashrom.org/pipermail/flashrom/2013-February/010533.html - Eon EN25Q64 to PREW (+PREW) http://www.flashrom.org/pipermail/flashrom/2013-January/010466.html Miscellaneous: - Fix superflouos line breaks in wiki mainboard and laptop output. - Use the .nh (no hyphenation) command in the manpage to enforce single-line URLs where useful. - Reference the manpage (besides the Laptops wiki page) in the laptop warning. - Minor output and whitespace fixes. - Add Fidelix IDs. - Add ISSE clones of PMC chips. - Fix typo: EMST -> ESMT. - Add ID of ESMT F25D08QA. - Refine GigaDevice GD25Q series (missing voltages and comments). - Use underscore instead of lower-case x as wildcard in Sharp chip names. Corresponding to flashrom svn r1650. Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at> Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
* Introduce msg_*warnStefan Tauner2013-01-041-1/+1
| | | | | | | | | | Also, unify all outputs of "Warning:" and "Error:" to use normal capitalization instead of mixing it with all capitals. Corresponding to flashrom svn r1643. Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at> Acked-by: Idwer Vollering <vidwer@gmail.com>
* Unify PCI init and let pcidev clean itself upStefan Tauner2013-01-041-4/+2
| | | | | | | | | | | | | | | | | | | Previously the internal programmer used its own code to initialize pcilib. This patch extracts the common code from the internal programmer and pcidev_init() into pcidev_init_common(). This fixes the non-existent PCI cleanup of the internal programmer and adds an additional safety by checking for an already existing PCI context. We got a nice shutdown function registration infrastructure, but did not use it very wisely. Instead we added shutdown functions to a myriad of programmers unnecessarily. In this patch we get rid of those that do only call pci_cleanup(pacc) by adding a shutdown function the pcidev.c itself that gets registered by pcidev_init(). Corresponding to flashrom svn r1642. Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* Fix flashrom running on boards with corebootStefan Tauner2012-09-241-7/+3
| | | | | | | | | | | | | | In r1577 we removed the discrimination of coreboot IDs and user-specified mainboards. The problem is that the board enable code required to find a board enable if either of these model strings were set. Therefore boards running coreboot that do not need a board enable failed to execute flashrom since then. This patch fixes this by handling coreboot IDs and user-supplied IDs differently again. Corresponding to flashrom svn r1605. Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at> Acked-by: Idwer Vollering <vidwer@gmail.com>
* Add a bunch of new/tested stuff and various small changes 14Stefan Tauner2012-09-211-3/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Tested Mainboards: OK: - ASUS M3A78-EH http://www.flashrom.org/pipermail/flashrom/2010-October/005297.html - ASUS P2B-LS http://www.flashrom.org/pipermail/flashrom/2010-November/005506.html - Biostar TA790GX A3+ http://paste.flashrom.org/view.php?id=1350 - ECS 848P-A7 http://www.flashrom.org/pipermail/flashrom/2011-January/005781.html - GIGABYTE GA-G41MT-S2PT Reported on IRC - GIGABYTE GA-H77-D3H Reported and tested by Alexander Gordeev on IRC. - Gigabyte GA-X79-UD5 http://www.flashrom.org/pipermail/flashrom/2012-August/009811.html - Shuttle FN78S http://www.flashrom.org/pipermail/flashrom/2012-August/009714.html - VIA EITX-3000 Reported on IRC by Tuju NOT OK: - Dell PowerEdge C6220 (0HYFFG) http://www.flashrom.org/pipermail/flashrom/2012-September/009900.html - Foxconn Q45M http://www.flashrom.org/pipermail/flashrom/2012-September/009923.html - MSI MS-7309 (K9N6SGM-V) http://www.flashrom.org/pipermail/flashrom/2012-August/009712.html - Supermicro X9QRi-F+ http://www.flashrom.org/pipermail/flashrom/2012-September/009887.html - ZOTAC H61-ITX WiFi (H61ITX-A-E) http://www.flashrom.org/pipermail/flashrom/2012-August/009649.html ASUS CUSL2-C has been tested to be working with the board enable once implemented for the TUSL2-C board. They seem to have the same PCI IDs as shown in the links below. Since only the CUSL2-C board enable has been tested yet, we distinguish the two by DMI strings. http://paste.flashrom.org/view.php?id=1393 http://www.flashrom.org/pipermail/flashrom/attachments/20091206/ddca2c6c/attachment-0002.eml Tested flash chips: - Set EMST F25L008A to PREW (+PREW) http://www.flashrom.org/pipermail/flashrom/2012-August/009714.html - Set GigaDevice GD25Q64 to PREW (+PREW) http://git.chromium.org/gitweb/?p=chromiumos/third_party/flashrom.git;a=commit;h=9e8ef49b1f626c2197e131fba6c5b65c8af4eeea - Set Macronix MX25L12805 to P (+P) http://www.flashrom.org/pipermail/flashrom/2012-September/009887.html - Set SST SST49LF003A/B to PREW (+EW) http://paste.flashrom.org/view.php?id=467 - Set Winbond W49V002FA to PREW (+EW) http://www.flashrom.org/pipermail/flashrom/2011-January/005781.html Tested chipsets: - Intel X79 (0x1d41) http://www.flashrom.org/pipermail/flashrom/2012-August/009811.html Board enables: - add ASUS P4P800-X Created by Idwer Vollering and tested by Mingsen Bao: http://paste.flashrom.org/view.php?id=467 - add DMI string to P4P800-VM Miscellaneous: - Add remaining Intel 7 series chipset (LPC) PCI IDs - Add generic SPI detection for chips from Winbond - Minor manpage changes - Minor other cleanups - Escape full stops after abbreviations in the manpage. - Add ICH9 and successors to spi_get_valid_read_addr Corresponding to flashrom svn r1601. Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at> Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
* Some ISO C fixesCarl-Daniel Hailfinger2012-08-271-0/+1
| | | | | | | | | | | | | | | | | This patch just fixes a limited number of bits not conforming to c99 by using - __asm__ instead of just asm - {0} instead of {} for struct initialization - h_addr_list[0] instead of h_addr to access the host address in struct hostent - #include <strings.h> where needed (for ffs and strcasecmp) Based on a previous patch by Carl-Daniel. Corresponding to flashrom svn r1585. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* Refactor the -p internal:mainboard handlingStefan Tauner2012-08-201-7/+26
| | | | | | | | | | | | | | | | This patch gets rid of some global variables and makes lots of bits along the code path that control the board enable execution more generic and clearer. From now on flashrom aborts on a few more occasions that should be safer for the user. For example it aborts if the enable function for the specified mainboard (enable) can not be found. Parts of the board_match_cbname refactoring were done by Carl-Daniel. Corresponding to flashrom svn r1577. Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at> Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* Remove more exit callsNiklas Söderlund2012-07-301-1/+1
| | | | | | | | | | | | | | | | This patch removes the remaining exit calls from - sp_openserport - sp_opensocket - sp_docommand - internal_init Almost all of this was done by Niklas. Corresponding to flashrom svn r1557. Signed-off-by: Niklas Söderlund <niso@kth.se> Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at> Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
* Automatically release I/O permissions on shutdownCarl-Daniel Hailfinger2012-07-211-2/+2
| | | | | | | | | | | | | | | | | | | | | Get_io_perms() is renamed to rget_io_perms() and automatically registers a function to release I/O permissions on shutdown. Actually release I/O permissions on Solaris and iopl()-supporting operating systems like Linux. This patch fixes quite a few programmers which forgot to release I/O permissions on shutdown, and it simplifies the shutdown and error handling code for all others. Do not call exit(1) if I/O permissions are denied and return an error instead. This part of the patch was written by Niklas Söderlund. Corresponding to flashrom svn r1551. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Signed-off-by: Niklas Söderlund <niso@kth.se> Acked-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de>
* Hide hwaccess.h from public APIPatrick Georgi2012-07-201-0/+1
| | | | | | | | | | | | | Move hwaccess.h #include from flash.h to individual drivers. libflashrom users need flash.h, but they do not care about hwaccess.h and should not see its definitions because they may conflict with other hardware access functions and #defines used by the libflashrom user. Corresponding to flashrom svn r1549. Signed-off-by: Patrick Georgi <patrick.georgi@secunet.com> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* Add Winbond W836xx SuperI/O detectionCarl-Daniel Hailfinger2012-05-061-5/+7
| | | | | | | | | | | | Add ITE IT8707F/IT8710F detection. Note that we autodetect those chips, but we don't handle their flash translation features automatically yet. Corresponding to flashrom svn r1533. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de>
* Fix parallel-style programmer access from ITE IT87/Winbond W83627 SPICarl-Daniel Hailfinger2012-03-011-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | The ITE IT87 SPI driver uses a trick to speed up reading and writing: If a flash chip is 512 kByte or less, the flash chip can be completely mapped in memory and both read and write accesses are faster that way. The current IT87 SPI code did use the parallel programmer interface for memory mapped reads and writes, but that's the wrong abstraction. It has been fixed to use mmio_read*/mmio_write* for that purpose. The Winbond W83627 SPI driver uses the same trick in its read path for all supported chip sizes. Fix it the same way. Switch internal_chip_readn to use mmio_readn as proper abstraction. Kudos to Michael Karcher for spotting the bugs. Tested-by: Johan Svensson <flashrom.js@crypt.se> Corresponding to flashrom svn r1511. Reported-by: Johan Svensson <flashrom.js@crypt.se> Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de>
* Replace --mainboard with -p internal:mainboardCarl-Daniel Hailfinger2012-01-041-0/+10
| | | | | | | | | | | | | | | | | | | | NOTE: The --list-supported-wiki output changed to use -p internal:mainboard= instead of -m The --list-supported output changed the heading of the mainboard list from Vendor Board Status Required option to Vendor Board Status Required value for -p internal:mainboard= Fix lb_vendor_dev_from_string() not to write to the supplied string. Corresponding to flashrom svn r1483. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
* Add struct flashctx * parameter to all functions accessing flash chipsCarl-Daniel Hailfinger2011-12-181-7/+28
| | | | | | | | | | | | | | | | All programmer access function prototypes except init have been made static and moved to the respective file. A few internal functions in flash chip drivers had chipaddr parameters which are no longer needed. The lines touched by flashctx changes have been adjusted to 80 columns except in header files. Corresponding to flashrom svn r1474. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de>
* Register Parallel/LPC/FWH programmers the same way SPI programmers are ↵Carl-Daniel Hailfinger2011-11-091-2/+17
| | | | | | | | | | | | | | | | | | | | registered All programmers are now calling programmer registration functions and direct manipulations of buses_supported are not needed/possible anymore. Note: Programmers without parallel/LPC/FWH chip support should not call register_par_programmer(). Additional fixes: Set max_rom_decode.parallel for drkaiser. Remove abuse of programmer_map_flash_region in it85spi. Annotate several FIXMEs in it85spi. Corresponding to flashrom svn r1463. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de>
* Make the laptop warning less scary if unsureStefan Tauner2011-09-131-6/+8
| | | | | | | | | | | | Telling the user to use "force_I_want_a_brick" if it is not even a laptop, is a bit over-the-top. Introduce a new laptop parameter "this_is_not_a_laptop" that allows to force operation, but only if the detection is not sure. Corresponding to flashrom svn r1440. Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* Introduce ERROR_FATAL, abort upon failed chipset enablesTadas Slotkus2011-09-031-1/+2
| | | | | | | Corresponding to flashrom svn r1426. Signed-off-by: Tadas Slotkus <devtadas@gmail.com> Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
* Rename CHIP_BUSTYPE_FOO to BUS_FOOCarl-Daniel Hailfinger2011-07-271-1/+1
| | | | | | | | | It's shorter to type, and we have less problems with the 80 column limit. Corresponding to flashrom svn r1396. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
* Be more refined regarding DMI chassis typesStefan Tauner2011-07-261-5/+14
| | | | | | | | | | | | | | | | | | | | | We had broken laptops in the past that were not detected as such because their DMI chassis-type was either undefined/out-of-spec, or set to 'other' or 'unknown'. this patch tries to mitigate this problem as follows: - if the DMI chassis-type clearly identifies the system as laptop/notebook/mobile platform then nothing changes: the user gets the laptop warning without a hint to the force switch. - if the DMI chassis-type is not specific enough, we warn the user similarly, but tell them the switch. to reduce the number of false positives i have added a few new chassis types that we have encountered in the last months to the list. Corresponding to flashrom svn r1390. Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* Change "class" parameter name to "devclass" to avoid C++ issuesUwe Hermann2011-07-131-2/+2
| | | | | | | | | | | | In C++ "class" is a reserved keyword, and as we'll want to use libflashrom from C++ code at some point, let's make sure it doesn't cause issues. Other places in the code already used "devclass" anyway, so it also increases consistency and readability a bit. Corresponding to flashrom svn r1371. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
* Use shutdown callback mechanism to shutdown programmersDavid Hendricks2011-06-141-7/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | This patch attempts to resolve some programmer shutdown ordering issues by having the programmer init functions register shutdown callbacks explicitly wherever it makes most sense. Before, assumptions were made that could lead to the internal programmer's state changing before the external programmer could be shut down properly. Now, each programmer cleans up after itself and (hopefully) performs each operation in the correct order. As a side-effect, this patch gives us a better usage model for reverse operations such as rpci_* and rmmio_*. In the long-run, this should make reversing the initialization process easier to understand, less tedious, and less error-prone. In short, this patch does the following: - Registers a shutdown callback during initialization for each programmer. - Kills the .shutdown function pointer from programmer_entry struct. Also, make most shutdown functions static. - Adds a few minor clean-ups and corrections (e.g. missing physunmap() calls). TODO: Remove forward declaration of serprog_shutdown() (added to simplify diff) Corresponding to flashrom svn r1338. Signed-off-by: David Hendricks <dhendrix@google.com> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* Kill central list of SPI programmersMichael Karcher2011-05-111-0/+5
| | | | | | | | | | | | | | | | | | Remove the array spi_programmer, replace it by dynamic registration instead. Also initially start with no busses supported, and switch to the default non-SPI only for the internal programmer. Also this patch changes the initialization for the buses_supported variable from "everything-except-SPI" to "nothing". All programmers have to set the bus type on their own, and this enables register_spi_programmer to just add the SPI both for on-board SPI interfaces (where the internal programmer already detected the other bus types), as well as for external programmers (where we have the default "none"). Corresponding to flashrom svn r1299. Signed-off-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* Revamp board-specific quirk handling, allow for laptop supportCarl-Daniel Hailfinger2011-05-051-3/+10
| | | | | | | | | | | | | | | | | | | | | | | | Handle board-specific quirks in three phases: 1. Before Super I/O probing (e.g. blacklisting of some Super I/O probes, or unhiding the Super I/O) 2. Before the laptop enforcement decision (e.g. whitelisting a laptop for flashing) 3. After chipset enabling (all current board enables) Implementation note: All entries in board_pciid_enables get an additional phase parameter. Alternative variants (3 tables instead of 1) also have their downsides, and I chose table bloat over table multiplication). With this patch, it should be possible to whitelist supported laptops with a matching entry (phase P2) in board_pciid_enables which points to a function setting laptop_ok=1. (In case DMI is broken, matching might be a little bit more difficult, but it is still doable.) Corresponding to flashrom svn r1294. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de>
* Add support for more than one Super I/O or EC per machineCarl-Daniel Hailfinger2011-04-271-3/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | | Flashrom currently only supports exactly one Super I/O or Embedded Controller, and this means quite a few notebooks and a small subset of desktop/server boards cannot be handled reliably and easily. Allow detection and initialization of up to 3 Super I/O and/or EC chips. WARNING! If a Super I/O or EC responds on multiple ports (0x2e and 0x4e), the code will do the wrong thing (namely, initialize the hardware twice). I have no idea if we should handle such situations, and whether we should ignore the second chip with identical ID or not. Initializing the hardware twice for the IT87* family is _not_ a problem, but I don't know how well IT85* can handle it (and whether IT85* would listen at more than one port anyway). Corresponding to flashrom svn r1289. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Thanks to Thomas Schneider for testing on a board with ITE IT87* SPI. Test report (success) is here: http://paste.flashrom.org/view.php?id=379 Thanks to David Hendricks for testing on a Google Cr-48 laptop with ITE IT85* EC SPI. Test report (success) is here: http://www.flashrom.org/pipermail/flashrom/2011-April/006275.html Acked-by: David Hendricks <dhendrix@google.com>
* Remove duplicate includes from the codeStefan Reinauer2010-10-061-2/+0
| | | | | | | Corresponding to flashrom svn r1196. Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* Support for Loongson-2F (MIPS) flashingVladimir 'phcoder' Serbinenko2010-09-291-1/+1
| | | | | | | Corresponding to flashrom svn r1183. Signed-off-by: Vladimir 'phcoder' Serbinenko <phcoder@gmail.com> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* internal: remove unused variablePeter Lemenkov2010-09-201-0/+2
| | | | | | | | | | | | | | | | | The variable 'ret' is unused when compiling on big-endian architecture. This produces an "unused variable" message, which might be treated as error if -Werror was passed to compiler. With this patch I was able to compile flashrom cleanly on ppc and ppc64: http://koji.fedoraproject.org/koji/taskinfo?taskID=2472482 http://koji.fedoraproject.org/koji/taskinfo?taskID=2472484 Corresponding to flashrom svn r1180. Signed-off-by: Peter Lemenkov <lemenkov@gmail.com> Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
* Split off programmer.h from flash.hCarl-Daniel Hailfinger2010-07-271-0/+1
| | | | | | | | | | | | | | | | | | | | | Programmer specific functions are of absolutely no interest to any file except those dealing with programmer specific actions (special SPI commands and the generic core). The new header structure is as follows (and yes, improvements are possible): flashchips.h flash chip IDs chipdrivers.h chip-specific read/write/... functions flash.h common header for all stuff that doesn't fit elsewhere hwaccess.h hardware access functions programmer.h programmer specific functions coreboot_tables.h header from coreboot, internal programmer only spi.h SPI command definitions Corresponding to flashrom svn r1112. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
* Generify support for ITE IT8705 Super I/OCarl-Daniel Hailfinger2010-07-101-2/+4
| | | | | | | | | | | | | | | | | Autodetect the ITE IT8705 Super I/O and enable flash writes if it performs LPC->Parallel translation. Remove board enables which triggered the IT8705 write enable manually. Change the IT87 SPI special case to cover IT87 LPC->SPI and LPC->Parallel translation. Corresponding to flashrom svn r1073. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Tested on Syntax SV266A. Acked-by: Paul Menzel <paulepanter@users.sourceforge.net> Tested on Shuttle AK38N, all operations work fine. Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
generated by cgit v1.2.3 (git 2.25.1) at 2024-11-04 21:12:33 +0000