| Commit message (Collapse) | Author | Age | Files | Lines |
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While super i/o is related to the internal programmer it
isn't actually _the_ internal programmer. Move register
logic to its own object consistent with other programmer
types.
Change-Id: I9a4c3e12bce5d22492c8d1b8f4a3f49d736dcf31
Signed-off-by: Edward O'Callaghan <quasisec@google.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/71577
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Anastasia Klimchuk <aklm@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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Make `force_boardenable` stack local to the internal_init()
entry-point. It's life-time should not exceed that of the
internal's init entry function.
Change-Id: I3324681f024003694a5531d9d35bb13d2c583eb0
Signed-off-by: Edward O'Callaghan <quasisec@google.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/70031
Reviewed-by: Sam McNally <sammc@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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A NULL func pointer is necessary and sufficient for the
condition `NULL func pointer => fallback_chip_X' as to not
need this explicit specification.
Therefore drop the explicit need to specify these fallback
callback function pointer in the par_master struct.
This is a reasonable default for every driver in the tree.
Furthermore, move the 'fallback_chip_X()' func from the
generic programmer.c register logic into its relevant
home of parallel.c and make static local to clean up
link-time symbol space.
This simplifies the code and driver development.
Change-Id: If25c0048a07057aa72be6ffa8d8ad7f0a568dcf7
Signed-off-by: Edward O'Callaghan <quasisec@google.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/71745
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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Craask and similar DUT's are erroneously probing random second chips.
```
Found chipset "Intel Alder Lake-N".
Enabling flash write... SPI Configuration is locked down.
FREG0: Flash Descriptor region (0x00000000-0x00000fff) is read-write.
FREG1: BIOS region (0x003a0000-0x00ffffff) is read-write.
FREG2: Management Engine region (0x00001000-0x0039ffff) is read-write.
OK.
Found Winbond flash chip "W25Q128.V..M" (16384 kB, Programmer-specific) on host.
Warning: Setting BIOS Control at 0xdc from 0x8b to 0x89 failed.
New value is 0x8b.
Found MoselVitelic flash chip "V29C51000T" (64 kB, Parallel) mapped at physical address 0x00000000ffff0000.
```
This seems to be due to `laptop_ok` becoming a stale global state
after the first operation leading to probing on unrelated buses.
Therefore unconditionally reset the global state upon entry into
the internal driver.
BUG=b:260518132,b:260151917
TEST=Craask reportly no longer finds duplicate chip.
Change-Id: I2c00c351904307eeb1488c5dfaffc91d6468ee25
Signed-off-by: Edward O'Callaghan <quasisec@google.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/70026
Reviewed-by: Sam McNally <sammc@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Anastasia Klimchuk <aklm@chromium.org>
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Change-Id: I51ee789f9a1443bfff1e3c85c9b40b5023db6062
Signed-off-by: Edward O'Callaghan <quasisec@google.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/68776
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Singer <felixsinger@posteo.net>
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Move (un)map_flash_region function pointers from programmer_entry to
par_master, spi_master, and opaque_master. This enables programmers to
specify a different mapper per bus, which is needed for the internal
programmer. Mapping is closely tied to the way the memory is accessed
using the other functions in the bus master structs.
Validate that FWH/LPC programmers provide specialized mapping in
register_par_master(); this is needed for chips with
FEATURE_REGISTERMAP, which only exist on FWH or LPC buses.
programmer.c: Update comment in fallback_map(), NULL return is the
desired behavior.
Test: Read firmware on SB600 Promontory mainboard (requires physmap)
Test: Read firmware externally with ft2232_spi
Test: Read firmware on ICH hwseq, verify physmap still occurs
Change-Id: I9c3df6ae260bcdb246dfb0cd8e043919609b014b
Signed-off-by: Jonathon Hall <jonathon.hall@puri.sm>
Co-Authored-by: Edward O'Callaghan <quasisec@google.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/67695
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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Drop the explicit need to specify the default 'internal_delay'
callback function pointer in the programmer_entry struct.
This is a reasonable default for every other driver in the
tree with only the two exceptions of ch341a_spi.c and serprog.c.
Thus this simplifies driver development.
Change-Id: I17460bc2c0aebcbb48c8dfa052b260991525cc49
Signed-off-by: Edward O'Callaghan <quasisec@google.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/67391
Reviewed-by: Peter Marheine <pmarheine@chromium.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Thomas Heijligen <src@posteo.de>
Reviewed-by: Felix Singer <felixsinger@posteo.net>
Reviewed-by: Nikolai Artemiev <nartemiev@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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Programmer params are now passed via the `programmer_cfg` struct, but
the internal programmer did not pass them to the `try_mtd()` function
which was still using `NULL`. This problem resulted in a segmentation
fault when trying to use the internal programmer.
TEST=Make sure internal programmer does not segfault on Haswell ULT.
Change-Id: I9e74bd68a1f9509a201dc518dbff96c27d68a3c3
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/67752
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Thomas Heijligen <src@posteo.de>
Reviewed-by: Felix Singer <felixsinger@posteo.net>
Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>
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Use the bool type instead of an integer for the variable `laptop_ok`,
since this represents its purpose much better.
Signed-off-by: Felix Singer <felixsinger@posteo.net>
Change-Id: I5d9fc3516bc2d29f11b056e35b3e5e324ce93423
Reviewed-on: https://review.coreboot.org/c/flashrom/+/66891
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Anastasia Klimchuk <aklm@chromium.org>
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Use the bool type instead of an integer for the variables
`force_laptop`, `not_a_laptop`, `force_boardenable` and
`force_boardmismatch` since this represents their purpose much better.
Signed-off-by: Felix Singer <felixsinger@posteo.net>
Change-Id: I159d789112d7a778744b59b45133df3928b8445e
Reviewed-on: https://review.coreboot.org/c/flashrom/+/66870
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Anastasia Klimchuk <aklm@chromium.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
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Change-Id: I963c674d212ce791ee155020fa97bcf26cefca0c
Signed-off-by: Edward O'Callaghan <quasisec@google.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/66673
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Anastasia Klimchuk <aklm@chromium.org>
Reviewed-by: Felix Singer <felixsinger@posteo.net>
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Ran;
```
$ find -name '*.c' -exec sed -i 's/extract_programmer_param_str(NULL/extract_programmer_param_str(cfg/g' '{}' \;
```
Manually fix i2c_helper_linux.c and other cases after.
Treat cases of;
- pcidev.c , and
- usb_device.c
as exceptional to be dealt with in later patches.
Change-Id: If7b7987e803d35582dda219652a6fc3ed5729b47
Signed-off-by: Edward O'Callaghan <quasisec@google.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/66656
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Anastasia Klimchuk <aklm@chromium.org>
Reviewed-by: Felix Singer <felixsinger@posteo.net>
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Modify the type signature of the programmer entry-point
xxx_init() functions to allow for the consumption of the
programmer parameterisation string data.
Change-Id: I598b1811c9734f41eee205d5a2b51ad8ac79e3ab
Signed-off-by: Edward O'Callaghan <quasisec@google.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/66662
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Singer <felixsinger@posteo.net>
Reviewed-by: Anastasia Klimchuk <aklm@chromium.org>
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Modify the type signature of each programmer entry-point
xxx_init() functions to allow for the consumption of the
programmer parameterisation string data.
```
$ find -name '*.c' -exec sed -i 's/_init(void)/_init(const char *prog_param)/g' '{}' \;
$ find -name '*.c' -exec sed -i 's/get_params(/get_params(const char *prog_param, /g' '{}' \;
$ find -name '*.c' -exec sed -i 's/const char \*prog_param)/const struct programmer_cfg *cfg)/g' '{}' \;
$ find -name '*.c' -exec sed -i 's/const char \*prog_param,/const struct programmer_cfg *cfg,/g' '{}' \;
```
and manually fix up any remaining parts.
Change-Id: I8bab51a635b9d3a43e1619a7a32b334f4ce2cdd2
Signed-off-by: Edward O'Callaghan <quasisec@google.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/66655
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Anastasia Klimchuk <aklm@chromium.org>
Reviewed-by: Felix Singer <felixsinger@posteo.net>
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Results can be reproduced with the following invocation;
```
$ find -name '*.c' -exec sed -i 's/extract_programmer_param_str(/extract_programmer_param_str(NULL, /g' '{}' \;
```
This allows for a pointer to the actual programmer parameters
to be passed instead of a global.
Change-Id: I781a328fa280e0a9601050dd99a75af72c39c899
Signed-off-by: Edward O'Callaghan <quasisec@google.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/66654
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Singer <felixsinger@posteo.net>
Reviewed-by: Anastasia Klimchuk <aklm@chromium.org>
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This patch changes the function name of extract_programmer_param() to
extract_programmer_param_str() as this function name will clearly
specify that it returns the value of the given parameter as a string.
Signed-off-by: Chinmay Lonkar <chinmay20220@gmail.com>
Change-Id: Id7b9fff4d3e1de22abd31b8123a1d237cd0f5c97
Reviewed-on: https://review.coreboot.org/c/flashrom/+/65521
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Singer <felixsinger@posteo.net>
Reviewed-by: Thomas Heijligen <src@posteo.de>
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Use `<tab>.key<tab>*= <value>,`
TEST: `make VERSION=0 MAN_DATE=0` returns the same flashrom binary
before and after the patch
Change-Id: I1c45ea9804ca09e040d7ac98255042f58b01f8ef
Signed-off-by: Thomas Heijligen <thomas.heijligen@secunet.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/65363
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Reviewed-by: Felix Singer <felixsinger@posteo.net>
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Also rename to `pcidev_find()` in fitting with pcidev.c helpers.
BUG=b:220950271
TEST=```sudo ./flashrom -p internal -r /tmp/bios
<snip>
Found Programmer flash chip "Opaque flash chip" (16384 kB, Programmer-specific) mapped at physical address 0x0000000000000000.
Reading flash... done.
```
Change-Id: Ie21f87699481a84398ca4450b3f03548f0528191
Signed-off-by: Edward O'Callaghan <quasisec@google.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/59280
Reviewed-by: Thomas Heijligen <src@posteo.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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Also rename to `pcidev_card_find()` in fitting with pcidev.c helpers.
BUG=b:220950271
TEST=```sudo ./flashrom -p internal -r /tmp/bios
<snip>
Found Programmer flash chip "Opaque flash chip" (16384 kB, Programmer-specific) mapped at physical address 0x0000000000000000.
Reading flash... done.
```
Change-Id: I026bfbecba114411728d4ad1ed8969b469fa7d2d
Signed-off-by: Edward O'Callaghan <quasisec@google.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/59279
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Thomas Heijligen <src@posteo.de>
Reviewed-by: Nikolai Artemiev <nartemiev@google.com>
Reviewed-by: Anastasia Klimchuk <aklm@chromium.org>
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BUG=b:220950271
TEST=```sudo ./flashrom -p internal -r /tmp/bios
<snip>
Found Programmer flash chip "Opaque flash chip" (16384 kB, Programmer-specific) mapped at physical address 0x0000000000000000.
Reading flash... done.
```
Change-Id: I1978e178fb73485f1c5c7e732853522847267cee
Signed-off-by: Edward O'Callaghan <quasisec@google.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/59277
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Anastasia Klimchuk <aklm@chromium.org>
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Make progress towards the goal of removing pacc from global
state as noted in the FIXME of programmer.h
BUG=b:220950271
TEST=```sudo ./flashrom -p internal --flash-size
<snip>
Found Programmer flash chip "Opaque flash chip" (16384 kB, Programmer-specific) mapped at physical address 0x0000000000000000.
16777216
```
Change-Id: Id83bfd41f785f907e52a65a6689e8c7016fc1b77
Signed-off-by: Edward O'Callaghan <quasisec@google.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/59275
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Reviewed-by: Anastasia Klimchuk <aklm@chromium.org>
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Move all programmer parameter wrangling into its own
function.
BUG=none
TEST=`flashrom -p internal` on dooly DUT.
Change-Id: I66bb370eb0466c5c838621762a6ba825c44567d4
Tested-by: Nikolai Artemiev <nartemiev@google.com>
Signed-off-by: Edward O'Callaghan <quasisec@google.com>
Signed-off-by: Nikolai Artemiev <nartemiev@google.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/61578
Reviewed-by: Anastasia Klimchuk <aklm@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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The changes to hwaccess in commit 49d758698a0dd166679c48b1a2785e50e9b0cc83
cause build failure on non-x86 systems because the hwaccess_x86_*
headers are included in some files that are built for all platforms
(particularly those in the internal programmer) and those headers in
turn include <sys/io.h> which only exists on x86.
This change avoids including those headers on non-x86 platforms so
the internal programmer can be built without errors.
The comment on the stub implementation of rget_io_perms() is also
modified to remove references to non-x86 platforms, since that file is
only built on x86 now.
BUG=None
TEST=meson build succeeds for both x86 and ARM targets
Signed-off-by: Peter Marheine <pmarheine@chromium.org>
Change-Id: I20f122679c30340b2c73afd7419e79644ddc3c4e
Reviewed-on: https://review.coreboot.org/c/flashrom/+/61194
Reviewed-by: Nico Huber <nico.h@gmx.de>
Reviewed-by: Thomas Heijligen <src@posteo.de>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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The mmio_le/be_read/writex functions are used for raw memory access.
Bundle them with the physmap functions.
Change-Id: I313062b078e89630c703038866ac93c651f0f49a
Signed-off-by: Thomas Heijligen <thomas.heijligen@secunet.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/61160
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
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Line up physmap with the other hwaccess related code.
Change-Id: Ieba6f4e94cfc3e668fcb8b3c978de5908aed2592
Signed-off-by: Thomas Heijligen <thomas.heijligen@secunet.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/60113
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
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Allow port I/O related code to be compiled independent from memory
mapping functionality. This enables for a better selection of needed
hardware access types.
Change-Id: I372b4a409f036da766c42bc406b596bc41b0f75a
Signed-off-by: Thomas Heijligen <thomas.heijligen@secunet.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/60110
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
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Split the include of hwaccess and libpci. There is no need to have pci.h
included in hwaccess.
Change-Id: Ibf00356f0ef5cc92e0ec99f8fe5cdda56f47b166
Signed-off-by: Thomas Heijligen <thomas.heijligen@secunet.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/58883
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
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Replace the remaining IS_* macros with the associated compiler defines
Change-Id: Ia0f022d12390722816066d292e1878824adc613c
Signed-off-by: Thomas Heijligen <thomas.heijligen@secunet.de>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/58280
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
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The #if defined(__i386__) || defined(__x86_64__) guard is commonly used
for x86 only code across flashrom.
Only platform.h and hwaccess.* use the IS_X86 macro.
Change-Id: I94a599431f58666189c8cd601286e9b30c8bf62b
Signed-off-by: Thomas Heijligen <thomas.heijligen@secunet.de>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/57942
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Felix Singer <felixsinger@posteo.net>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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Change-Id: I3d02bd789f0299e936eb86819b3b15b5ea2bb921
Signed-off-by: Thomas Heijligen <thomas.heijligen@secunet.de>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/52946
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Anastasia Klimchuk <aklm@chromium.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
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It was impossible to register a const struct par_master that would
point to dynamically allocated `data`. Fix that so that we won't
have to create more mutable globals.
BUG=b:185191942
TEST=builds
Change-Id: I95bc92f6c54c5bcdac1c522ca87054aaffed0f40
Signed-off-by: Anastasia Klimchuk <aklm@chromium.org>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/54169
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>
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Include platform.h in all files using its macros.
BUG=none
TEST=builds
Signed-off-by: Miriam Polzer <mpolzer@google.com>
Change-Id: If17a3d58c02222f61b4e0335879eeed1638b583c
Reviewed-on: https://review.coreboot.org/c/flashrom/+/48880
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Idwer Vollering <vidwer@gmail.com>
Reviewed-by: David Hendricks <david.hendricks@gmail.com>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
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This makes it again easier to parse internal.c by consolidating
some processor wraps and labeling the ends of others.
BUG=none
BRANCH=none
TEST=builds
Change-Id: I32fb1a3fff7afa671f08fb2cc2ad406772f5e10f
Signed-off-by: Edward O'Callaghan <quasisec@google.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/46815
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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This just makes internal.c at bit easier to parse and helps
the read get a view of all the singleton state in one go.
BUG=none
BRANCH=none
TEST=builds
Change-Id: Id4109dfb17f63d80fb3fb3f2a1d0ab54d9eddc6e
Signed-off-by: Edward O'Callaghan <quasisec@google.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/46814
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
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This just makes internal.c a little easier to parse and avoids
some fn prototypes on the mental stack.
BUG=none
BRANCH=none
TEST=builds
Change-Id: I693e30068e6a53b5fc161d895af451540650a8fe
Signed-off-by: Edward O'Callaghan <quasisec@google.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/46813
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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The board vendor and model are sometimes specified as arguments during
an internal flash, so make sure they are freed at the end of
initialization.
Change-Id: I9f43708f3b075896be67acec114bc6f390f8c6ca
Signed-off-by: Jacob Garber <jgarber1@ualberta.ca>
Found-by: Coverity CID 1230664, 1230665
Reviewed-on: https://review.coreboot.org/c/flashrom/+/34846
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: David Hendricks <david.hendricks@gmail.com>
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These functions are no longer used, or were never used in the first place.
generate_testpattern() - Introduced in commit eaac68bf8b, never used
list_programmers() - Introduced in commit 552420b0d6, never used
pci_dev_find_filter() - Prototype removed in commit 5c316f9549
erase_chip_jedec() - Usage and prototype removed in commit f52f784bb3
printlock_regspace2_blocks() - Introduced in commit ef3ac8ac17, never used
spi_write_status_enable() - Usage dropped in commit fcbdbbc0d4
Change-Id: I742164670521fea65ffa3808446594848ce63cec
Signed-off-by: Jacob Garber <jgarber1@ualberta.ca>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/33669
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
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We used to bail out on any unknown laptop. However, modern systems with
SPI flashes don't suffer from the original problem. Even if a flash chip
is shared with the EC, the latter has to expect the host to send regular
JEDEC SPI commands any time.
So instead of bailing out, we limit the set of buses to probe. If we
suspect to be running on a laptop, we only allow probing of SPI and
opaque programmers. The user can still use the existing force options
to probe all buses.
This will obsolete some board-enables that could be moved to `print.c`
in follow-up commits.
Change-Id: I1dbda8cf0c10d7786106f14f0d18c3dcce35f0a3
Signed-off-by: Nico Huber <nico.h@gmx.de>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/28716
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Thomas Heijligen <src@posteo.de>
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This imports a series of patches from chromiumos for MTD support.
The patches are squashed to ease review and original Change-Ids have
been removed to avoid confusing Gerrit.
There are a few changes to integrate the code:
- Conflict resolution
- Makefile changes
- Remove file library usage from linux_mtd. We may revisit this and use
it for other Linux interfaces later on.
- Switch to using file stream functions for reads and writes.
This consolidated patch is
Signed-off-by: David Hendricks <dhendricks@fb.com>
The first commit's message is:
Initial MTD support
This adds MTD support to flashrom so that we can read, erase, and
write content on a NOR flash chip via MTD.
BUG=chrome-os-partner:40208
BRANCH=none
TEST=read, write, and erase works on Oak
Signed-off-by: David Hendricks <dhendrix@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/272983
Reviewed-by: Shawn N <shawnn@chromium.org>
This is the 2nd commit message:
linux_mtd: Fix compilation errors
This fixes compilation errors from the initial import patch.
Signed-off-by: David Hendricks <dhendricks@fb.com>
This is the 3rd commit message:
linux_mtd: Suppress message if NOR device not found
This just suppresses a message that might cause confusion for
unsuspecting users.
BUG=none
BRANCH=none
TEST=ran on veyron_mickey, "NOR type device not found" message
no longer appears under normal circumstances.
Signed-off-by: David Hendricks <dhendrix@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/302145
Commit-Ready: David Hendricks <dhendrix@chromium.org>
Tested-by: David Hendricks <dhendrix@chromium.org>
Reviewed-by: Shawn N <shawnn@chromium.org>
This is the 4th commit message:
linux_mtd: Support for NO_ERASE type devices
Some mtd devices have the MTD_NO_ERASE flag set. This means
these devices don't require an erase to write and might not have
implemented an erase function. We should be conservative and skip
erasing altogether, falling back to performing writes over the whole
flash.
BUG=b:35104688
TESTED=Zaius flash is now written correctly for the 0xff regions.
Signed-off-by: William A. Kennington III <wak@google.com>
Reviewed-on: https://chromium-review.googlesource.com/472128
Commit-Ready: William Kennington <wak@google.com>
Tested-by: William Kennington <wak@google.com>
Reviewed-by: Brian Norris <briannorris@chromium.org>
This is the 5th commit message:
linux_mtd: do reads in eraseblock-sized chunks
It's probably not the best idea to try to do an 8MB read in one syscall.
Theoretically, this should work; but MTD just relies on the SPI driver
to deliver the whole read in one transfer, and many SPI drivers haven't
been tested well with large transfer sizes.
I'd consider this a workaround, but it's still good to have IMO.
BUG=chrome-os-partner:53215
TEST=boot kevin; `flashrom --read ...`
TEST=check for performance regression on oak
BRANCH=none
Signed-off-by: Brian Norris <briannorris@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/344006
Reviewed-by: David Hendricks <dhendrix@chromium.org>
This is the 6th commit message:
linux_mtd: make read/write loop chunks consistent, and documented
Theoretically, there should be no maximum size for the read() and
write() syscalls on an MTD (well, except for the size of the entire
device). But practical concerns (i.e., bugs) have meant we don't quite
do this.
For reads:
Bug https://b/35573113 shows that some SPI-based MTD drivers don't yet
handle very large transactions. So we artificially limit this to
block-sized chunks.
For writes:
It's not clear there is a hard limit. Some drivers will already split
large writes into smaller chunks automatically. Others don't do any
splitting. At any rate, using *small* chunks can actually be a problem
for some devices (b:35104688), as they get worse performance (doing an
internal read/modify/write). This could be fixed in other ways by
advertizing their true "write chunk size" to user space somehow, but
this isn't so easy.
As a simpler fix, we can just increase the loop increment to match the
read loop. Per David, the original implementation (looping over page
chunks) was just being paranoid.
So this patch:
* clarifies comments in linux_mtd_read(), to note that the chunking is
somewhat of a hack that ideally can be fixed (with bug reference)
* simplifies the linux_mtd_write() looping to match the structure in
linux_mtd_read(), including dropping several unnecessary seeks, and
correcting the error messages (they referred to "reads" and had the
wrong parameters)
* change linux_mtd_write() to align its chunks to eraseblocks, not page
sizes
Note that the "->page_size" parameter is still somewhat ill-defined, and
only set by the upper layers for "opaque" flash. And it's not actually
used in this driver now. If we could figure out what we really want to
use it for, then we could try to set it appropriately.
BRANCH=none
BUG=b:35104688
TEST=various flashrom tests on Kevin
TEST=Reading and writing to flash works on our zaius machines over mtd
Change-Id: I3d6bb282863a5cf69909e28a1fc752b35f1b9599
Signed-off-by: Brian Norris <briannorris@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/505409
Reviewed-by: David Hendricks <dhendrix@chromium.org>
Reviewed-by: Martin Roth <martinroth@chromium.org>
Reviewed-by: William Kennington <wak@google.com>
Reviewed-on: https://review.coreboot.org/25706
Tested-by: David Hendricks <david.hendricks@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com>
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Change-Id: I7bfc339673cbf5ee2d2ff7564c4db04ca088d0a4
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/25381
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
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internal_init() explicitly fails on everything but x86 and mipsel.
Instead, we can just never build the internal programmer on other
architectures and drop a lot of #if boilerplate.
Change-Id: I672ddab0415df3baa49ff39a1c9db1b41d8143a4
Signed-off-by: Nico Huber <nico.h@gmx.de>
Reviewed-on: https://review.coreboot.org/22671
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: David Hendricks <david.hendricks@gmail.com>
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
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By adding more #if guards, fix warnings about unused constants that
are enabled by default in newer GCC versions.
Change-Id: Ib3b6d7c0c2fadc4faeab971673bfadb1a6d25919
Signed-off-by: Nico Huber <nico.h@gmx.de>
Reviewed-on: https://review.coreboot.org/22669
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: David Hendricks <david.hendricks@gmail.com>
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
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Also, add a target to the makefile to build a flashrom.8.html with groff.
To fix some formatting issues this adds some indention commands as well.
Corresponding to flashrom svn r1913.
Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
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We do CPU architecture checks once for the makefile in arch.h and
once for HW access abstraction in hwaccess.c. This patch unifies
related files so that they can share the checks to improve
maintainability and reduce the chance of inconsistencies.
Furthermore, it refines some of the definitions, which
- adds "support" for AARCH64 and PPC64,
- adds big-endian handling on arm as well as LE handling on PPC64,
- fixes compilation of internal.c on AARCH64 and PPC64.
Additionally, this patch continues to unify all OS checks in
flashrom by adding a new helper macro IS_WINDOWS.
The old header file for architecture checking is renamed to platform.h
to reflect its broader scope and all new macros are add in there.
Corresponding to flashrom svn r1864.
Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
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The former will be useful in cases where cleanup equals a simple call to free().
Corresponding to flashrom svn r1848.
Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
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Register_programmer suggests that we register a programmer. However,
that function registers a master for a given bus type, and a programmer
may support multiple masters (e.g. SPI, FWH). Rename a few other
functions to be more consistent.
Corresponding to flashrom svn r1831.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
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Thanks to Vadim Girlin for finding out how to do that.
This is known to work on GA-MA770-UD3, GA-B75M-D3V, GA-B75N and
GA-H61M-S1 (only M_BIOS is populated).
Corresponding to flashrom svn r1720.
Signed-off-by: Vadim Girlin <vadimgirlin@gmail.com>
Signed-off-by: Damien Zammit <damien@zamaudio.com>
Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
Tested-by: Damien Zammit <damien@zamaudio.com>
Tested-by: Anton Kochkov <anton.kochkov@gmail.com>
Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
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Improve compilation with libpayload (compiling flashrom.c and
linking is still broken):
- disable Ponyprog (which enforced serial.c compilation)
- make errno available where it is needed
Fix internal.c for non-x86 and enable cb parsing on ARM.
Fix mingw builds by using its __USE_MINGW_ANSI_STDIO macro
and gnu_printf definition for printf format style checking.
See http://sourceforge.net/apps/trac/mingw-w64/wiki/gnu%20printf
This requires inclusion of stdio.h in flash.h.
Fix order of libraries in the Makefile:
FEATURE_LIBS needs to come *after* PCILIBS in case ZLIB is needed by it.
Corresponding to flashrom svn r1697.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
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Tested Mainboards:
OK:
- Acer V75-M (used in IBM Aptiva 2170-G)
http://www.flashrom.org/pipermail/flashrom/2012-December/010300.html
- Acorp 6M810C
http://www.flashrom.org/pipermail/flashrom/2013-January/010433.html
- ASRock G31M-S rev 2.0
http://www.flashrom.org/pipermail/flashrom/2013-February/010538.html
- ASUS F1A75-V PRO
http://paste.flashrom.org/view.php?id=1528
- ASUS M5A97 (rev. 1.0)
http://www.flashrom.org/pipermail/flashrom/2013-February/010483.html
- ASUS P5KPL-AM IN/GB
http://www.flashrom.org/pipermail/flashrom/2013-January/010455.html
- GABYTE GA-H77M-D3H
http://www.flashrom.org/pipermail/flashrom/2013-February/010538.html
NOT OK:
- GIGABYTE GA-Z77MX-D3H
http://paste.flashrom.org/view.php?id=1529
http://paste.flashrom.org/view.php?id=1530
Tested flash chips:
- Winbond W25X10 to PREW (+PREW)
Reported on IRC(?)
- Eon EN25Q32(A/B) to PREW (+REW)
http://www.flashrom.org/pipermail/flashrom/2013-February/010533.html
- Eon EN25Q64 to PREW (+PREW)
http://www.flashrom.org/pipermail/flashrom/2013-January/010466.html
Miscellaneous:
- Fix superflouos line breaks in wiki mainboard and laptop output.
- Use the .nh (no hyphenation) command in the manpage to enforce
single-line URLs where useful.
- Reference the manpage (besides the Laptops wiki page) in the laptop warning.
- Minor output and whitespace fixes.
- Add Fidelix IDs.
- Add ISSE clones of PMC chips.
- Fix typo: EMST -> ESMT.
- Add ID of ESMT F25D08QA.
- Refine GigaDevice GD25Q series (missing voltages and comments).
- Use underscore instead of lower-case x as wildcard in Sharp chip names.
Corresponding to flashrom svn r1650.
Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
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Also, unify all outputs of "Warning:" and "Error:" to use normal
capitalization instead of mixing it with all capitals.
Corresponding to flashrom svn r1643.
Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
Acked-by: Idwer Vollering <vidwer@gmail.com>
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