aboutsummaryrefslogtreecommitdiffstats
path: root/sb600spi.c
Commit message (Collapse)AuthorAgeFilesLines
* sb600spi: Cleanup spispeed and spireamode warningsRob Barnes2021-11-041-3/+3
| | | | | | | | | | | | | | | | | | These warnings are printed at error level so they are displayed with every invocation of flashrom. This clutters the flashrom output in the usual case. Move warnings to debug level, add newline and clean up text. TEST=Deploy to guybrush, observe messages are only seen when --verbose is enabled BUG=None BRANCH=None Change-Id: Idf5e735b9e504c943bf93a428da64976d723eb2c Signed-off-by: Rob Barnes <robbarnes@google.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/58529 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Raul Rangel <rrangel@chromium.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
* remove compile guardsThomas Heijligen2021-09-261-4/+0
| | | | | | | | | | | | | The build system handles the decision when to build a file. Extra compile guards for the source files are not necessary. Change-Id: I76a76e05c7a7dd27637325ab1e9d8946fd5f9076 Signed-off-by: Thomas Heijligen <thomas.heijligen@secunet.de> Reviewed-on: https://review.coreboot.org/c/flashrom/+/57797 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Singer <felixsinger@posteo.net> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Nico Huber <nico.h@gmx.de>
* spi_master: Use new API to register shutdown functionAnastasia Klimchuk2021-08-251-2/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This allows spi masters to register shutdown function in spi_master struct, which means there is no need to call register_shutdown in init function, since this call is now a part of register_spi_master. As a consequence of using new API, two things are happening here: 1) No resource leakage anymore in case register_shutdown() would fail, 2) Fixed propagation of register_spi_master() return values. Basic testing: when I comment out free(data) in linux_spi_shutdown, test fails with error ../linux_spi.c:235: note: block 0x55a4db276510 allocated here ERROR: linux_spi_init_and_shutdown_test_success leaked 1 block(s) Means, shutdown function is invoked. BUG=b:185191942 TEST= 1) builds and ninja test including CB:56911 2) On ARMv7 device flashrom -p linux_spi -V -> using linux_spi, chip found 3) On x86_64 AMD device flashrom -p internal -V -> this is actually using sb600spi, chip found Change-Id: Ib60300f9ddb295a255d5ef3f8da0e07064207140 Signed-off-by: Anastasia Klimchuk <aklm@chromium.org> Reviewed-on: https://review.coreboot.org/c/flashrom/+/56103 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>
* spi_master: Move shutdown function above spi_master structAnastasia Klimchuk2021-08-171-11/+11
| | | | | | | | | | | | | | | | | | | This patch prepares spi masters to use new API which allows to register shutdown function in spi_master struct. See also later patch in this chain, where spi masters are converted to new API. BUG=b:185191942 TEST=builds and ninja test Comparing flashrom binary before and after the patch, make clean && make CONFIG_EVERYTHING=yes VERSION=none binary is the same Change-Id: I50716686552b4ddcc6089d5afadb19ef59d9f9b4 Signed-off-by: Anastasia Klimchuk <aklm@chromium.org> Reviewed-on: https://review.coreboot.org/c/flashrom/+/56101 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Edward O'Callaghan <quasisec@chromium.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
* treewide: Drop most cases of `sizeof(struct ...)`Angel Pons2021-06-091-1/+1
| | | | | | | | | | | | | | | | Spelling out the struct type name hurts readability and introduces opportunities for bugs to happen when the pointer variable type is changed but the corresponding sizeof is (are) not. TEST=`make CONFIG_EVERYTHING=yes CONFIG_JLINK_SPI=no VERSION=none -j` with and without this patch; the flashrom executable does not change. Change-Id: Icc0b60ca6ef9f5ece6ed2a0e03600bb6ccd7dcc6 Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/55266 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de> Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>
* sb600spi.c: Drop sb600_ prefix for spi data struct memberAnastasia Klimchuk2021-05-231-4/+4
| | | | | | | | | | | | | | The name of the struct type already contains sb600spi_ prefix, so prefix doesn't need to be repeated in members name. BUG=b:185191942 TEST=builds Change-Id: I001ae2044453d1bc205fa253ffb773ed993f57f8 Signed-off-by: Anastasia Klimchuk <aklm@chromium.org> Reviewed-on: https://review.coreboot.org/c/flashrom/+/54714 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>
* sb600spi.c: Make use of new register_spi_master() APIAnastasia Klimchuk2021-05-231-10/+6
| | | | | | | | | | | | | | | Pass pointers to dynamically allocated data to register_spi_master(). This way we can avoid mutable globals. BUG=b:185191942 TEST=builds Change-Id: Id555dc5e125309883a816e00afb26d7141fd870d Signed-off-by: Anastasia Klimchuk <aklm@chromium.org> Reviewed-on: https://review.coreboot.org/c/flashrom/+/54713 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Edward O'Callaghan <quasisec@chromium.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
* sb600spi.c: Move sb600_spibar into spi data instead of being globalAnastasia Klimchuk2021-05-231-20/+28
| | | | | | | | | | | | | | | This driver already has sb600spi_data struct, and sb600_spibar can be its member instead of being a global variable. BUG=b:185191942 TEST=builds Change-Id: Ifaad0f0a2c0e956029d2df18ddcfd092515ca3c0 Signed-off-by: Anastasia Klimchuk <aklm@chromium.org> Reviewed-on: https://review.coreboot.org/c/flashrom/+/54712 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Edward O'Callaghan <quasisec@chromium.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
* programmer: Smoothen register_spi_master() APINico Huber2021-05-131-3/+3
| | | | | | | | | | | | | It was impossible to register a const struct spi_master that would point to dynamically allocated `data`. Fix that so that we won't have to create more mutable globals. Change-Id: I0c753b3db050fb87d4bbe2301a7ead854f28456f Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/c/flashrom/+/54066 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Anastasia Klimchuk <aklm@chromium.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
* sb600spi.c: Detect rev 0x51 as PromontoryEdward O'Callaghan2020-12-231-1/+1
| | | | | | | | | | As reported on the mailing list. Change-Id: Iff8340633021fde1dc32572ab5f5da85df5d9048 Signed-off-by: Edward O'Callaghan <quasisec@google.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/48779 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
* sb600spi.c: Add support for 0x790b rev 0x61 (AMD Zen)Edward O'Callaghan2020-12-161-3/+64
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Adds support for rev 0x59 || 0x61 of did 0x790b. This is quite confusing however it turns out FCH chipsets called 'Promontory' contain the so-called SPI100 ip core that uses memory mapping and not a ring buffer for transactions. Typically this is found on both Stoney Ridge and Zen platforms. In light of this, separate out the promontory path into its own callback struct state tracker so that it's implementation does not interfere with previous generations that predate the SPI100 controller. Since there is some life-time state required to track the mapping during between the first attempted read and the final tear-down of the spi master we take the opportunity to avoid static locals and instead implement the functionality in a re-entrant way for follow up clean ups. BUG=none BRANCH=none TEST= Zork => 'Promontory (rev 0x61) detected.' && Grunt => 'Promontory (rev 0x4b) detected.' Change-Id: I5ce63b5de863aed0442cb4ffeff981e9b2fa445b Signed-off-by: Edward O'Callaghan <quasisec@google.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/44073 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Sam McNally <sammc@google.com>
* sb600spi.c: Remove 'amd_gen' out of global stateEdward O'Callaghan2020-11-251-27/+24
| | | | | | | | | | | | Have 'determine_generation()' explicitly return 'amd_gen' and then pass the state into what requires it, thus making the code more pure, easier to read and more unit-testable. Change-Id: I99fbad9486123c6b921eab83756de54a53ddfa7a Signed-off-by: Edward O'Callaghan <quasisec@chromium.org> Reviewed-on: https://review.coreboot.org/c/flashrom/+/36432 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Sam McNally <sammc@google.com>
* sb600spi.c: Reorder functions with primitives at the topEdward O'Callaghan2020-11-221-25/+20
| | | | | | | | | | | | | | | Reshuffle file with no semantic changes, this avoids unnecessary prototypes for static member functions as to be an easier implementation to parse. BUG=none TEST=builds Change-Id: If3970d850989eafc59cec9158ecfcdafc7a8caea Signed-off-by: Edward O'Callaghan <quasisec@google.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/47665 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Sam McNally <sammc@google.com>
* const'ify flashctx to align signatures with cros flashromEdward O'Callaghan2020-04-301-5/+5
| | | | | | | | | | | | | | | | The ChromiumOS flashrom fork has since const'ify flashctx in a few places. This aligns the function signatures to match with downstream to ease forward porting patches out of downstream back into mainline flashrom. This patch is minimum viable alignment and so feedback is welcome. Change-Id: Iff6dbda13cb0d941481c0d204b9c30895630fbd1 Signed-off-by: Edward O'Callaghan <quasisec@google.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/40324 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* sb600spi: Add spireadmodeRob Barnes2020-03-031-43/+80
| | | | | | | | | | | | | | | | | | Added spireadmode for >= Bolton. Do not override speed or read mode for >= Bolton if parameter not specified. Minor cleanup of sb600spi.c code. TEST=Manual: deploy on tremblye read flash using various parameters BUG=b:147665085,b:147666328 BRANCH=master Change-Id: Id7fec7eb87ff811148217dc56a86dca3fef122ff Signed-off-by: Rob Barnes <robbarnes@google.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/38833 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Edward O'Callaghan <quasisec@chromium.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
* sb600spi.c: Generalise determin_generation() after YangtzeEdward O'Callaghan2019-11-141-21/+9
| | | | | | | | | | Drop dead USE_YANGTZE_HEURISTICS code and add Promontory support. Change-Id: I5aa7370025f5c1af56c6cb96194b6f3007d0ede7 Signed-off-by: Edward O'Callaghan <quasisec@chromium.org> Reviewed-on: https://review.coreboot.org/c/flashrom/+/36426 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
* sb600spi.c: Fold up debug logic into determine_generation()Edward O'Callaghan2019-11-141-9/+12
| | | | | | | | | Change-Id: I6c722e29b321285bf20fb5ee30c912dcdd83411b Signed-off-by: Edward O'Callaghan <quasisec@chromium.org> Reviewed-on: https://review.coreboot.org/c/flashrom/+/36425 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
* sb600spi.c: Consolidate smbus dev revision derivationEdward O'Callaghan2019-11-141-13/+17
| | | | | | | | | | | V.2: Rename 'find_smbus_dev()' -> 'find_smbus_dev_rev()'. Change-Id: I766b29cc1c7d01aa0bcf6cb9ff5ab73fa1995dcd Signed-off-by: Edward O'Callaghan <quasisec@chromium.org> Reviewed-on: https://review.coreboot.org/c/flashrom/+/36420 Reviewed-by: Patrick Georgi <pgeorgi@google.com> Reviewed-by: Nico Huber <nico.h@gmx.de> Tested-by: Nico Huber <nico.h@gmx.de>
* Fix -Wsign-compare troubleNico Huber2019-07-311-2/+2
| | | | | | | | | | | Mostly by changing to `unsigned` types where applicable, sometimes `signed` types, and casting as a last resort. Change-Id: I08895543ffb7a48058bcf91ef6500ca113f2d305 Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/c/flashrom/+/30409 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Jacob Garber <jgarber1@ualberta.ca>
* spi: Drop spi_controller typeNico Huber2019-06-271-2/+0
| | | | | | | | | | Not needed anymore. Drop it fast before it encourages anyone to violate layers again! Change-Id: I8eda93b429e3ebaef79e22aba76be62987e496f4 Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/c/flashrom/+/33651 Reviewed-by: Angel Pons <th3fanbus@gmail.com>
* Fix several -Wno-implicit-fallthrough warningsRichard Hughes2019-02-111-0/+1
| | | | | | | | | | | | GCC is picky about the comment being where the break should go. Change-Id: I05db2fb34025fefe2c6ddd1274c8e45b7cc5a4b6 Signed-off-by: Richard Hughes <richard@hughsie.com> Reviewed-on: https://review.coreboot.org/c/30406 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
* Remove address from GPLv2 headersElyes HAOUAS2018-04-241-4/+0
| | | | | | | | Change-Id: I7bfc339673cbf5ee2d2ff7564c4db04ca088d0a4 Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/25381 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
* sb600spi: Add support for Merlin Falcon ChipsetRicardo Ribalda Delgado2017-09-171-5/+23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch has been tested on a board similar to AMD Bettong. 00:14.0 SMBus [0c05]: Advanced Micro Devices, Inc. [AMD] FCH SMBus Controller [1022:790b] (rev 4a) 00:14.3 ISA bridge [0601]: Advanced Micro Devices, Inc. [AMD] FCH LPC Bridge [1022:790e] (rev 11) root@qt5022-fglrx:~# ./flashrom -p internal -w kk.rom flashrom v0.9.9-unknown on Linux 4.10.0-qtec-standard (x86_64) flashrom is free software, get the source code at https://flashrom.org Calibrating delay loop... OK. coreboot table found at 0x9ffd6000. Found chipset "AMD FP4". Enabling flash write... OK. Found Micron/Numonyx/ST flash chip "N25Q128..1E" (16384 kB, SPI) mapped at physical address 0x00000000ff000000. Reading old flash chip contents... done. Erasing and writing flash chip... Erase/write done. Verifying flash... VERIFIED. Change-Id: I66a240ebc8382cc7e5156686045aee1a9d03fe6d Signed-off-by: Ricardo Ribalda Delgado <ricardo.ribalda@gmail.com> Reviewed-on: https://review.coreboot.org/21429 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: David Hendricks <david.hendricks@gmail.com>
* Add a bunch of new/tested stuff and various small changes 25Stefan Tauner2016-03-131-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Tested mainboards: OK: - ASRock Fatal1ty 970 Performance and P4i65G Reported by anonymous email message ID: 932677687262b1300eaf14260999d9262c31@guerrillamail.com The latter actually had a tested board enable already. Flash chips: - Eon EN25Q128 to PREW (+PREW) Reported by Adrian Graham - GigaDevice GD25VQ41B to PREW (+PREW) Reported by David Hendricks - Winbond W39V040FB to PREW (+EW) Reported by fjed on IRC Miscellaneous: - Change PCI IDs of "MS-6577 (Xenon)" board enable. The previous IDs contained the on-board display adapter which is disabled when a dedicated graphics card is installed. - Add a note to the README how to overcome the clang warning if only a single programmer is enabled. - Fix some typo and manpage problems found by lintian - r1920 introduced some explicit calls to pkg-config instead of $(PKG_CONFIG). This patch corrects that. - Make MS-7094 (K8T Neo2-F V2.0) board enable less contestable. Previous PCI IDs were board-specific but ot the other of devices that could be disabled by the firmware or that vary among hardware revions. There are no good alternatives available. However, since we always have a DMI decoder available now, we can use non-board-specific devices without taking risks. Thanks to Uwe Hermann for reporting and testing. - Some other small changes to clean up whitespace and fix some warnings from Debian's lintian. Corresponding to flashrom svn r1951. Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at> Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* sb600spi: rewrite and fix corner caseCarl-Daniel Hailfinger2016-03-121-13/+14
| | | | | | | | | | | Specifying spispeed=reserved as programmer parameter resulted in selecting the default SPI speed instead of aborting. Rewrite the logic to be more readable. Corresponding to flashrom svn r1949. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
* Add a bunch of new/tested stuff and various small changes 22Stefan Tauner2015-02-081-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Tested mainboards: OK: - AOpen UK79G-1394 (used in EZ18 barebones) Reported by Lawrence Gough - ASUS M4N78 SE Reported by Dima Veselov - ASUS P5LD2-VM Mark board enable as tested (reported by Dima Veselov) - GIGABYTE GA-970A-UD3P (rev. 2.0) Reported by trucmar on IRC - GIGABYTE GA-990FXA-UD3 (rev. 4.0) Reported by ROKO__ on IRC - GIGABYTE GA-H77-DS3H (rev. 1.1) Reported by Evgeniy Edigarev - GIGABYTE GA-P55-USB3 (rev. 2.0) Reported by Måns Thörnqvist - MSI MS-7817 (H81M-E33) Reported by Igor Kolker Chipsets: - Marked Intel Bay Trail (0x0f1c) as tested OK Reported by Antonio Ospite - Refine Intel IDs * Add IDs for Braswell * Add IDs for 9 Series PCHs (e.g. H97, Z97) * Rename Wellsburg devices slightly Flash chips: - Atmel AT25DF041A to PREW (+PREW) Reported by Tai-hwa Liang - Atmel AT26DF161 to PREW (+EW) Reported by Steve Shenton - Atmel AT45DB011D to PREW (+PREW) Reported by The Raven - Atmel AT45DB642D to PREW (+PREW) Reported by Mahesh Mokal - Eon EN25F32 to PREW (+PREW) Reported by Arman Khodabande - Eon EN25F40 to PREW (+REW) Reported by Jerrad Pierce - Eon EN25QH16 to PREW (+EW) Reported by Ben Johnson - GigaDevice GD25Q20(B) to PREW (+PREW) Reported by Gilles Aurejac - Macronix MX25U6435E/F to PR (+PR) Reported by Matt Taggart - PMC Pm25LV512(A) to PREW (+PREW) Reported by The Raven - SST SST39VF020 to PREW (+PREW) Reported by Urja Rannikko - Winbond W25Q40.V to PREW (+EW) Reported by Torben Nielsen - Add E variants of MX25Lx006 (MX25L2006E, MX25L4006E, MX25L8006E). - Add MX25L6465E variant. - There was never a MX25L12805 AFAICT. - Split MX25L12805 from models with the same ID but an additional 32 kB eraser: MX25L12835F/MX25L12845E/MX25L12865E. - Add a bunch of ST parallel NOR flash chip IDs. Miscellaneous: - Whitelist ThinkPad X200. - Constify master parameter of register_master(). - Remove FEATURE_BYTEWRITES because it was never used at all. - Refine hwseq messages and make them less prominent. - Fix the yet unused PRIxCHIPADDR format string thingy. - Fix copy&paste error in spi_prettyprint_status_register_bp(). Spotted by Pablo Cases. - Add an additional SMBus controller revision to identify another Yangtze model. Thanks to Dan Christensen for reporting this issue. - dediprog: add missing include for stdlib.h. This fixes (at least) building on FreeBSD and DragonflyBSD with gcc. - Remove references to struct pci_filter from programmer.h. It is only needed in internal.c where it has a complete type. Having it in programmer.h provokes a warning by some old versions of gcc. - Tiny other stuff. Corresponding to flashrom svn r1879. Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at> Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
* Add a bunch of new/tested stuff and various small changes 21Stefan Tauner2014-08-061-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Tested mainboards: OK: - ASUS F2A85-M Reported by various corebooters - ASUS M2N-MX SE Plus Reported by Antonio - ASUS P5LD2 Reported by François Revol - Lenovo ThinkPad T530 Reported and partially authored by Edward O'Callaghan - MSI MS-7502 (Medion MD8833) Reported by naq on IRC - Shuttle AB61 Reported by olofolleola4 - ZOTAC IONITX-F-E Reported by Bernardo Kuri Flash chips: - Atmel AT45DB021D to PREW (+PREW) Reported by The Raven - Atmel AT25F4096 to PREW (+PREW) Reported by 공준혁 - GigaDevice GD25Q16(B) to PREW (+PREW) Reported by luxflow@live.com using a GD25Q16BSIG - Catalyst CAT28F512 Mark erase and write as known bad (not implemented) Miscellaneous: - Various spelling corrections by Daniele Forsi. - Added and refined a bunch of chips originally investigated by Carl-Daniel. - Marked the ARM-USB-OCD-H programmer as tested (reported by Ruud Schramp). - Tiny other stuff. Corresponding to flashrom svn r1839. Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at> Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
* Rename programmer registration functionsCarl-Daniel Hailfinger2014-07-191-6/+6
| | | | | | | | | | | | Register_programmer suggests that we register a programmer. However, that function registers a master for a given bus type, and a programmer may support multiple masters (e.g. SPI, FWH). Rename a few other functions to be more consistent. Corresponding to flashrom svn r1831. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
* Add support for AMD Bolton chipsetMartin Roth2014-07-151-20/+26
| | | | | | | | | | | | | | SPI controller on the bolton chipset uses the same 3-bit speed settings as Yangtze, but is otherwise the same as the Hudson chips. Note that the Bolton RRG doesn't specify a speed setting for the bit setting of 0b111, so I'm assuming that it's the same setting as Yangtze. Corresponding to flashrom svn r1830. Signed-off-by: Martin Roth <martin.roth@se-eng.com> Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at> Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
* sbxxx: Add spispeed parameterStefan Tauner2014-05-161-0/+23
| | | | | | | | | | | | | | | | | Allow to set the SPI clock frequency on AMD chipsets with a programmer parameter. If the parameter is given (and matches a possible value), the SPI clock is set temporarily. Both registers are restored on programmer shutdown. Example: ./flashrom -p internal:spispeed="33 MHz" -V Possible values for spispeed are "16.5 MHz", "22 MHz", "33 MHz", "66 MHz", "100 MHZ" and "800 kHz" depending on the chipset generation. Corresponding to flashrom svn r1795. Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at> Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
* sbxxx: Add support for new AMD SPI controllerWei Hu2014-05-161-10/+128
| | | | | | | | | | | | | | This patch adds support for the "SPI 100" SPI engine in Yangtze FCHs (found in Kabini and Temash). Tested reading/writing on ASRock IMB-A180 and PC Engines' APU board. Corresponding to flashrom svn r1794. Signed-off-by: Wei Hu <wei@aristanetworks.com> Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at> Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
* sbxxx: CleanupStefan Tauner2014-05-161-98/+88
| | | | | | | | | | | | | - Move programmer definition to the top. - Rewrite array accesses to use indices instead of using pointer arithmetic. - Move length check and opcode extraction to a function. - Move IMC parameter handling into existing IMC handling function. - Split comparing and resetting the FIFO pointer. Corresponding to flashrom svn r1793. Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at> Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
* sbxxx: Set SPI clock to 16.5 MHz and disable fast readsStefan Tauner2013-09-151-8/+63
| | | | | | | | | | | | | | Do not rely on broken firmware to set up the SPI configuration correctly. Some boards fail with flashrom because the firmware chose too high speeds for the alternate SPI mode which flashrom uses. Temporarily change the clock to the lowest common value of 16.5 MHz. Also, disable fast reads just to be safe. Corresponding to flashrom svn r1750. Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* Remove exit call and mayfail parameter from physmap_common()Niklas Söderlund2013-09-141-1/+1
| | | | | | | | | | | | | | | The only call path where exit was reached was from physmap functions. Callers of physmap() et al. which were not prepared to handle ERROR_PTR return values have been adjusted. physmap_try_ro() has been renamed to physmap_ro() and physmap_common() slightly refactored due to the now removed *FAIL parameters. Corresponding to flashrom svn r1745. Signed-off-by: Niklas Söderlund <niso@kth.se> Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at> Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
* sbxxx: Add detection for the remaining AMD chipset familiesStefan Tauner2013-09-121-27/+110
| | | | | | | | | | | | | Also, correct prettyprinting of the registers of the various families, and abort if SpiAccessMacRomEn or SpiHostAccessRomEn prohibit full access. Tested reading/writing on ASRock IMB-A180, and chipset detection on one of each affected generation by Chris Goodrich from Sage. Corresponding to flashrom svn r1741. Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* Automatically unmap physmap()sStefan Tauner2013-08-141-2/+4
| | | | | | | | | | | | Similarly to the previous PCI self-clean up patch this one allows to get rid of a huge number of programmer shutdown functions and makes introducing bugs harder. It adds a new function rphysmap() that takes care of unmapping at shutdown. Callers are changed where it makes sense. Corresponding to flashrom svn r1714. Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* Detect AMD Yangtze (found in Kabini and Tamesh)Stefan Tauner2013-08-081-5/+64
| | | | | | | | | | | | | | | | | | | | | | | The PCI ID of the LPC bridge doesn't change between Hudson-2/3/4 and Yangtze (Kabini/Temash) but the SPI interface does. Bail out in case we detect Yangtze and add infrastructure to distinguish other families too for further refactorings. Also, add ASRock IMB-A180 to the laptop whitelist and refine the IMC warning a bit. Tested on ASRock IMB-A180 with and w/o USE_YANGTZE_HEURISTICS, and by Chris Goodrich from Sage on - SB600 - SB700 - SB800 - Hudson 3 (A70M) - Kabini Corresponding to flashrom svn r1706. Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at> Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
* sbxxx: Handle active IMCs in AMD chipsetsRudolf Marek2013-07-251-20/+55
| | | | | | | | | | | | Detect and temporarily disable the IMC while accessing the flash. Disable writes on default, but allow the user to enforce it. Corresponding to flashrom svn r1704. Signed-off-by: Rudolf Marek <r.marek@assembler.cz> Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at> Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at> Acked-by: David Hendricks <dhendrix@google.com>
* sbxxx: spibar[0] debug print refinementsStefan Tauner2013-06-161-2/+3
| | | | | | | | | | | | Newer models support a 66 MHz clock and fast reads. We should probably distinguish the models better (as we do in ichspi) and add support for frequency selection etc. For now this has to suffice. Corresponding to flashrom svn r1678. Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at> Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
* Hide hwaccess.h from public APIPatrick Georgi2012-07-201-0/+1
| | | | | | | | | | | | | Move hwaccess.h #include from flash.h to individual drivers. libflashrom users need flash.h, but they do not care about hwaccess.h and should not see its definitions because they may conflict with other hardware access functions and #defines used by the libflashrom user. Corresponding to flashrom svn r1549. Signed-off-by: Patrick Georgi <patrick.georgi@secunet.com> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* Let the programmer driver decide how to do AAI transfersNico Huber2012-06-151-0/+1
| | | | | | | | | | | | | | | | Currently spi_aai_write() is implemented without an abstraction mechanism for the programmer driver. This adds another function pointer 'write_aai' to struct spi_programmer, which is set to default_spi_write_aai (renamed spi_aai_write) for all programmers for now. A patch which utilises this abstraction in the dediprog driver will follow. Corresponding to flashrom svn r1543. Signed-off-by: Nico Huber <nico.huber@secunet.com> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* Add struct flashctx * parameter to all functions accessing flash chipsCarl-Daniel Hailfinger2011-12-181-2/+4
| | | | | | | | | | | | | | | | All programmer access function prototypes except init have been made static and moved to the respective file. A few internal functions in flash chip drivers had chipaddr parameters which are no longer needed. The lines touched by flashctx changes have been adjusted to 80 columns except in header files. Corresponding to flashrom svn r1474. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de>
* Add AMD Hudson chipset-enableWang Qing Pei2011-08-261-2/+5
| | | | | | | | | | AMD Hudson has different vendor/device IDs than AMD SBx00, handle that properly. Corresponding to flashrom svn r1422. Signed-off-by: Wang Qing Pei <wangqingpei@gmail.com> Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
* Remove unneeded inclusions of chipdrivers.hStefan Tauner2011-08-161-1/+0
| | | | | | | | | | | | | | | | | | | | | | This is related to the spi split patch as discussed in: http://www.flashrom.org/pipermail/flashrom/2010-February/thread.html#2364 the old commit (r914) log notes: "Some of the spi programmer drivers required chipdrivers.h, needs fixing later: it87spi.c ichspi.c sb600spi.c wbsio_spi.c buspirate_spi.c ft2232spi.c bitbang_spi.c dediprog.c" there still remain a few cases where chipdrivers.h is needed: dediprog.c (spi_read_chunked and spi_write_chunked) it87spi.c (due to spi_write_enable and spi_read_status_register) wbsio_spi.c (spi_programmer registration only) besides that, there are also non-spi files that do not need it. also, add flash.h to chipdrivers.h because it uses some types of it and remove flashchips.h from print.c Corresponding to flashrom svn r1414. Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at> Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
* Kill central list of SPI programmersMichael Karcher2011-05-111-3/+12
| | | | | | | | | | | | | | | | | | Remove the array spi_programmer, replace it by dynamic registration instead. Also initially start with no busses supported, and switch to the default non-SPI only for the internal programmer. Also this patch changes the initialization for the buses_supported variable from "everything-except-SPI" to "nothing". All programmers have to set the bus type on their own, and this enables register_spi_programmer to just add the SPI both for on-board SPI interfaces (where the internal programmer already detected the other bus types), as well as for external programmers (where we have the default "none"). Corresponding to flashrom svn r1299. Signed-off-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* Factor out SPI write/read chunking wrappersMichael Karcher2011-05-111-11/+0
| | | | | | | Corresponding to flashrom svn r1298. Signed-off-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* Convince compilers to put constant data into the .rodata sectionMathias Krause2011-01-171-1/+1
| | | | | | | | | | | | | | | | This patch reduces the stack usage by declaring 'const' stack variables as 'static const' so they end up in the .rodata section instead of being copied from there to the stack for every invocation of the corresponding function. As a plus we end up in having a smaller binary as the "copy from .rodata to stack" code isn't emitted by the compiler any more (roughly -100 bytes). Corresponding to flashrom svn r1252. Signed-off-by: Mathias Krause <mathias.krause@secunet.com> Acked-by: Stefan Reinauer <stepan@coreboot.org>
* Detect embedded EC (IMC) in AMD's SBsCarl-Daniel Hailfinger2010-09-151-0/+18
| | | | | | | | | | | | | | | | | | | | | | | | | | AMD SB700 and later have an integrated microcontroller (IMC) which runs from shared flash. The IMC will happily issue reads while we write, issue writes while we read, and generally cause lots of havoc due to the concurrent accesses it performs while flashrom is running. A failing or corrupted read can be detected since r1145, and the worst case is that the read aborts and the user has to retry. A failing write is much more serious. It can be detected since r1145, but if the SPI interface locks up, we can't continue writing nor can we read the current chip contents. If the IMC is inactive, there is no reason to worry. If the IMC is active, flashrom will refuse to erase/write the chip with this patch. The correct fix would be to stop the IMC during flashing, but apparently the relevant registers are undocumented, so we take the safe route for now until someone from AMD can give us more info. Corresponding to flashrom svn r1173. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Tested-by: Matthias Kretz <kretz@kde.org> Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
* Add paranoid checks to sb600spi driverCarl-Daniel Hailfinger2010-08-181-7/+74
| | | | | | | | | | | | | | | | | | | | | Add paranoid checks for correct values in essential registers in the SB600/SB700/... SPI driver. If something else changes the values we wrote, we will see severe read/write corruption. sb600spi will now abort the access and return an error if it detects this sort of corruption. Note: This corruption can be caused by a few different events: - IPMI/BMC/IMC accesses flash - Other software accesses flash The nature of flash access (read/write/ID/...) is irrelevant. Each such access will cause corruption for all other accesses happening at the same time. Thanks to Matthias Kretz for testing this patch. Corresponding to flashrom svn r1145. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Matthias Kretz <kretz@kde.org>
* Split off programmer.h from flash.hCarl-Daniel Hailfinger2010-07-271-0/+1
| | | | | | | | | | | | | | | | | | | | | Programmer specific functions are of absolutely no interest to any file except those dealing with programmer specific actions (special SPI commands and the generic core). The new header structure is as follows (and yes, improvements are possible): flashchips.h flash chip IDs chipdrivers.h chip-specific read/write/... functions flash.h common header for all stuff that doesn't fit elsewhere hwaccess.h hardware access functions programmer.h programmer specific functions coreboot_tables.h header from coreboot, internal programmer only spi.h SPI command definitions Corresponding to flashrom svn r1112. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
generated by cgit v1.2.3 (git 2.25.1) at 2024-11-05 02:09:43 +0000