| Commit message (Collapse) | Author | Age | Files | Lines |
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The bug was invisible so far because we always started at offset 0. The
pending partial write patch uses nonzero start offsets and trips over
this bug.
Clarify a few comments in IT87 SPI.
Thanks to Idwer Vollering for reporting write breakage with my latest
partial write patch. This should fix the underlying problem.
Corresponding to flashrom svn r1217.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Idwer Vollering <vidwer@gmail.com>
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The inner write functions which handle partial write are renamed to the
original name of their wrappers. The write wrappers are removed.
Corresponding to flashrom svn r1211.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Tested-by: Maciej Pijanka <maciej.pijanka@gmail.com>
Tested-by: Andrew Morgan <ziltro@ziltro.com>
Tested-by: Idwer Vollering <vidwer@gmail.com>
Acked-by: Idwer Vollering <vidwer@gmail.com>
Tested-by: Sean Nelson <audiohacked@gmail.com>
Acked-by: Sean Nelson <audiohacked@gmail.com>
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Flashrom had an implicit erase-on-write for most flash chip and
programmer drivers, but it was not entirely consistent.
Some drivers had their own hand-rolled partial update functionality
which made handling partial updates from generic code impossible.
Move implicit erase out of chip drivers, and kill some dead erase
functions at the same time. A full chip erase is now performed in the
generic code for all flash chips on write, and after that the whole chip
is written.
Corresponding to flashrom svn r1206.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
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SPI write status register (WRSR) may take longer than 100 ms, and it
makes sense to poll for completion in 10 ms steps until 5 s are over.
This patch complements r1115.
Corresponding to flashrom svn r1201.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Joshua Roys <roysjosh@gmail.com>
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Use AAI write for SST SST25VF032B.
Speedup from 228 to 113 seconds.
Use page (256 byte) write for SST SST25VF064C.
Speedup from 3091 to 123 seconds.
Corresponding to flashrom svn r1194.
Signed-off-by: Helge Wagner <helge.wagner@ge.com>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
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AM_* -> AMD_AM*
AT_* -> ATMEL_AT*
EN_* -> EON_EN*
HY_* -> HYUNDAI_HY*
MBM* -> FUJITSU_MBM*
MX_ID -> MACRONIX_ID
MX_* -> MACRONIX_MX*
PMC_* -> PMC_PM*
SST_* -> SST_SST*
It leaves the Intel #defines alone because there is another pending
patch for that:
http://patchwork.coreboot.org/patch/1937/
Some background discussion here:
http://www.flashrom.org/pipermail/flashrom/2010-July/004059.html
Corresponding to flashrom svn r1175.
Signed-off-by: Mattias Mattsson <vitplister@gmail.com>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
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Add support for Atmel AT25DF081A and AT25DQ161.
Some chips require EWSR before WRSR, others require WREN before WRSR,
and some support both variants. Add feature_bits to select the correct
SPI command, and default to EWSR.
Corresponding to flashrom svn r1115.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Tested-by: Steven Rosario
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
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Programmer specific functions are of absolutely no interest to any file
except those dealing with programmer specific actions (special SPI
commands and the generic core).
The new header structure is as follows (and yes, improvements are
possible):
flashchips.h flash chip IDs
chipdrivers.h chip-specific read/write/... functions
flash.h common header for all stuff that doesn't fit elsewhere
hwaccess.h hardware access functions
programmer.h programmer specific functions
coreboot_tables.h header from coreboot, internal programmer only
spi.h SPI command definitions
Corresponding to flashrom svn r1112.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
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http://www.amictechnology.com/pdf/A25L20P.pdf covers:
AMIC A25L05PT
AMIC A25L05PU
AMIC A25L10PT
AMIC A25L10PU
AMIC A25L20PT
AMIC A25L20PU
http://www.amictechnology.com/pdf/A25L16P.pdf covers:
AMIC A25L16PT
AMIC A25L16PU
Clarify the situation surrounding the A25L40PT and A25L40PU chips which
share the same RDID values, despite the fact that their erase block
layouts are different. Rudolf Marek tested and confirmed the distinct
erase block layouts of these chips.
Add a pretty-printer for the AMIC SPI chip status register
Add a generic AMIC chip type.
Corresponding to flashrom svn r1096.
Signed-off-by: Daniel Lenski <dlenski@gmail.com>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
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Actually check if the unlock worked instead of just assuming it worked.
Corresponding to flashrom svn r1082.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de>
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However, wrap the write functions in a compat layer to allow converting
the rest of flashrom later. Tested on Intel NM10 by David Hendricks.
Corresponding to flashrom svn r1080.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de>
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Besides that, the function as implemented just walks the chip and
ignores sector sizes.
Sector erase with SPI opcode 0xd8 is of course still supported.
Kill a declaration for a nonexisting function while we're at it.
Corresponding to flashrom svn r1054.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Sean Nelson <audiohacked@gmail.com>
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Modernize SPI AAI code, blacklist IT87 SPI for AAI, allow AAI to run
without warnings on ICH/VIA SPI. Add some code to make conversion to
partial write possible for AAI.
Corresponding to flashrom svn r1052.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Sean Nelson <audiohacked@gmail.com>
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Use a blacklist instead of a whitelist for 4-byte SPI RDID.
Tell users where to report bugs.
Corresponding to flashrom svn r1051.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Sean Nelson <audiohacked@gmail.com>
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capitalization)
CONFIG_FT2232SPI (makefile config option)
FT2232_SPI_SUPPORT (#define)
ft2232spi (programmer name)
ft2232_spi.c (programmer file)
Use CONFIG_* with underscores for makefile config options and #defines
and kill the useless _SUPPORT idiom.
Use lowercase names with underscores for programmer names and programmer
files.
With this, you can run "grep -i ft2232_spi" and find everything related
to the ft2232_spi driver. Same applies to all other programmers.
Corresponding to flashrom svn r1023.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
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Some chips implement the RES (0xab) opcode, but they use a non-standard
two byte response instead of the usual one byte response. A two-byte
response has the accuracy of REMS and RDID, so don't check for REMS/RDID
availability before running a two-byte RES.
Corresponding to flashrom svn r1017.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
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- x86/x86_64 (little endian)
- PowerPC (big endian)
- MIPS (big+little endian)
No changes to programmer specific code. This means any drivers with MMIO
access will _not_ suddenly start working on big endian systems, but with
this patch everything is in place to fix them.
Compilation should work on all architectures listed above for all
drivers except nic3com and nicrealtek which require PCI Port IO which is
x86-only for now.
To compile without nic3com and nicrealtek, run
make distclean
make CONFIG_NIC3COM=no CONFIG_NICREALTEK=no
Thanks to Misha Manulis for testing early versions of this patch on
PowerPC (big endian) with the satasii programmer.
Thanks to Segher Boessenkool for design review and for helping out with
compiler tricks and pointing out that we need eieio on PowerPC.
Thanks to Vladimir Serbinenko for compile testing on MIPS (little
endian) and PowerPC (big endian) and for runtime testing on MIPS (little
endian).
Thanks to David Daney for compile testing on MIPS (big endian).
Thanks to Uwe Hermann for compile and runtime testing on x86_64.
DO NOT RUN flashrom ON NON-X86 AFTER APPLYING THIS PATCH!
This patch only provides the infrastructure, but does not convert any
drivers, so flashrom will compile, but it won't do the right thing on
non-x86 platforms.
Corresponding to flashrom svn r1013.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Misha Manulis <misha@manulis.com>
Acked-by: Vladimir 'phcoder/φ-coder' Serbinenko <phcoder@gmail.com>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Segher Boessenkool <segher@kernel.crashing.org>
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Every SPI programmer driver had its own completely different chip write
implementation, and all of them were insufficiently commented. Create
spi_write_chunked as a copy of spi_read_chunked and convert all SPI
programmers to use it. No functional changes except: - Bus Pirate uses
12 Byte writes instead of 8 Byte writes - SB600 uses 5 Byte writes
instead of 1 Byte writes
Corresponding to flashrom svn r1005.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de>
Acked-by: David Hendricks <dhendrix@google.com>
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Corresponding to flashrom svn r982.
Signed-off-by: Sean Nelson <audiohacked@gmail.com>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
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flash.h
Some of the spi programmer drivers required chipdrivers.h, needs fixing later:
it87spi.c
ichspi.c
sb600spi.c
wbsio_spi.c
buspirate_spi.c
ft2232spi.c
bitbang_spi.c
dediprog.c
Corresponding to flashrom svn r914.
Signed-off-by: Sean Nelson <audiohacked@gmail.com>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
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