From b1e558389a6124df202bc03b336518fc93209cb5 Mon Sep 17 00:00:00 2001 From: Angel Pons Date: Sat, 29 Feb 2020 23:13:43 +0100 Subject: chipset_enable.c: Mark Skylake U Premium as DEP Tested reading, writing and erasing the internal flash chip using an Acer Aspire ES1-572 laptop with an Intel i3-6006U. However, since all ME-enabled chipsets are marked as DEP instead of OK, this one shall follow suit as well. Change-Id: Ib8ee9b5e811df74d2f48bd409806c72fe862bc24 Signed-off-by: Angel Pons Reviewed-on: https://review.coreboot.org/c/flashrom/+/39173 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel Reviewed-by: David Hendricks --- chipset_enable.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/chipset_enable.c b/chipset_enable.c index 84e4b6b5..4afb0e44 100644 --- a/chipset_enable.c +++ b/chipset_enable.c @@ -1987,7 +1987,7 @@ const struct penable chipset_enables[] = { {0x8086, 0x9d41, B_S, NT, "Intel", "Skylake / Kaby Lake Sample", enable_flash_pch100}, {0x8086, 0x9d43, B_S, NT, "Intel", "Skylake U Base", enable_flash_pch100}, {0x8086, 0x9d46, B_S, NT, "Intel", "Skylake Y Premium", enable_flash_pch100}, - {0x8086, 0x9d48, B_S, NT, "Intel", "Skylake U Premium", enable_flash_pch100}, + {0x8086, 0x9d48, B_S, DEP, "Intel", "Skylake U Premium", enable_flash_pch100}, {0x8086, 0x9d4b, B_S, NT, "Intel", "Kaby Lake Y w/ iHDCP2.2 Prem.", enable_flash_pch100}, {0x8086, 0x9d4e, B_S, DEP, "Intel", "Kaby Lake U w/ iHDCP2.2 Prem.", enable_flash_pch100}, {0x8086, 0x9d50, B_S, NT, "Intel", "Kaby Lake U w/ iHDCP2.2 Base", enable_flash_pch100}, -- cgit v1.2.3