From 4bd41e6bb5b96d7f71bebc03be93c7f7b433569e Mon Sep 17 00:00:00 2001 From: Thomas Heijligen Date: Wed, 16 Mar 2022 09:19:19 +0100 Subject: hwaccess_x86_msr: rename msr function to msr_xxx This eliminates the need to redefine the rdmsr and wrmsr symbols, resulting in more understandable code. The common prefix clarify the relation between the functions. Change-Id: Ie5ad54d198312578e0a1ee719eec67b37d2bf6a4 Signed-off-by: Thomas Heijligen Reviewed-on: https://review.coreboot.org/c/flashrom/+/62851 Tested-by: build bot (Jenkins) Reviewed-by: Nico Huber --- chipset_enable.c | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) (limited to 'chipset_enable.c') diff --git a/chipset_enable.c b/chipset_enable.c index b050f642..27ab1267 100644 --- a/chipset_enable.c +++ b/chipset_enable.c @@ -1264,21 +1264,21 @@ static int enable_flash_cs5536(struct pci_dev *dev, const char *name) msr_t msr; /* Geode only has a single core */ - if (setup_cpu_msr(0)) + if (msr_setup(0)) return -1; - msr = rdmsr(MSR_RCONF_DEFAULT); + msr = msr_read(MSR_RCONF_DEFAULT); if ((msr.hi >> 24) != 0x22) { msr.hi &= 0xfbffffff; - wrmsr(MSR_RCONF_DEFAULT, msr); + msr_write(MSR_RCONF_DEFAULT, msr); } - msr = rdmsr(MSR_NORF_CTL); + msr = msr_read(MSR_NORF_CTL); /* Raise WE_CS3 bit. */ msr.lo |= 0x08; - wrmsr(MSR_NORF_CTL, msr); + msr_write(MSR_NORF_CTL, msr); - cleanup_cpu_msr(); + msr_cleanup(); #undef MSR_RCONF_DEFAULT #undef MSR_NORF_CTL -- cgit v1.2.3