From 7f3c3f5c4807f4f3c0c2de405189e86b3f8d77a3 Mon Sep 17 00:00:00 2001 From: Nikolai Artemiev Date: Mon, 5 Dec 2022 13:06:14 +1100 Subject: flashchips.c: remove WREN from GD25Q256D enter 4BA sequence As noted in a comment on `commit 86fc9cf7ab221bc54ef6f10252e296fc2d7a22d2`, the GD25Q256D datasheet indicates that the chip does not require a WREN command to enter 4BA mode. Testing has confirmed that a WREN command is not required, so change the flashchip feature flags from FEATURE_4BA_WREN to FEATURE_4BA. Ticket: https://ticket.coreboot.org/issues/356 BUG=none BRANCH=none TEST=read/write/erase/verify GD25Q256D flash with FT2232H programmer TEST=called spi_enter_exit_4ba(true), dumped registers, checked ADS=1. Change-Id: I96e48933f33c52c0d10a0d4cb7f7e07c1fceab99 Signed-off-by: Nikolai Artemiev Reviewed-on: https://review.coreboot.org/c/flashrom/+/70342 Tested-by: build bot (Jenkins) Reviewed-by: Anastasia Klimchuk Reviewed-by: Nico Huber --- flashchips.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'flashchips.c') diff --git a/flashchips.c b/flashchips.c index 6f653892..7ea86012 100644 --- a/flashchips.c +++ b/flashchips.c @@ -6849,7 +6849,7 @@ const struct flashchip flashchips[] = { .model_id = GIGADEVICE_GD25Q256D, .total_size = 32768, .page_size = 256, - .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP | FEATURE_4BA_WREN | + .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP | FEATURE_4BA | FEATURE_WRSR_EXT2 | FEATURE_WRSR2 | FEATURE_WRSR3, .tested = TEST_OK_PREWB, .probe = PROBE_SPI_RDID, -- cgit v1.2.3