From fe47c15b999f45d67e637666bccb472c2adf7dd1 Mon Sep 17 00:00:00 2001 From: Nico Huber Date: Sat, 28 May 2022 14:26:06 +0200 Subject: flashchips: Add Spansion (today Infineon) S25FL128L and S25FL256L These chips seem to be rather regular, supporting 2.7V..3.6V, the common erase block sizes 4KiB, 32KiB, 64KiB and the usual block- protection bits. Status/configuration register naming differs from other vendors, though. These chips have 2 status registers plus 3 configuration registers. Configuration registers 1 & 2 match status registers 2 & 3 of what we are used from other vendors. Read opcodes match too, however writes are always done through the WRSR instruction which can write up to 4 bytes (SR1, CR1, CR2, CR3). S25FL256L supports native 4BA commands and entering a 4BA mode. However, it uses an unusual opcode (0x53) for the 32KiB 4BA block erase. Signed-off-by: Nico Huber Change-Id: I356df6649f29e50879a4da4183f1164a81cb0a09 Reviewed-on: https://review.coreboot.org/c/flashrom/+/64747 Reviewed-by: Thomas Heijligen Tested-by: build bot (Jenkins) --- include/chipdrivers.h | 1 + 1 file changed, 1 insertion(+) (limited to 'include/chipdrivers.h') diff --git a/include/chipdrivers.h b/include/chipdrivers.h index 33e2914a..2ef7f183 100644 --- a/include/chipdrivers.h +++ b/include/chipdrivers.h @@ -41,6 +41,7 @@ int spi_block_erase_20(struct flashctx *flash, unsigned int addr, unsigned int b int spi_block_erase_21(struct flashctx *flash, unsigned int addr, unsigned int blocklen); int spi_block_erase_50(struct flashctx *flash, unsigned int addr, unsigned int blocklen); int spi_block_erase_52(struct flashctx *flash, unsigned int addr, unsigned int blocklen); +int spi_block_erase_53(struct flashctx *flash, unsigned int addr, unsigned int blocklen); int spi_block_erase_5c(struct flashctx *flash, unsigned int addr, unsigned int blocklen); int spi_block_erase_60(struct flashctx *flash, unsigned int addr, unsigned int blocklen); int spi_block_erase_62(struct flashctx *flash, unsigned int addr, unsigned int blocklen); -- cgit v1.2.3