From f6d702e2d09f604830070fc0079374955481be5d Mon Sep 17 00:00:00 2001 From: Nico Huber Date: Sat, 28 May 2022 16:48:26 +0200 Subject: spi25_statusreg: Allow WRSR_EXT for Status Register 3 Spansion flash chips S25FL128L and S25FL256L use the WRSR instruction to write more than 2 registers. So align SR2 and SR3 support: The current FEATURE_WRSR_EXT is renamed to FEATURE_WRSR_EXT2 and FEATURE_WRSR_EXT3 is added. Also, WRSR3 needs a separate flag now. Verified that FEATURE_WRSR_EXT2 still works using the `dummy_flasher`. Signed-off-by: Nico Huber Change-Id: Ibdfc6eb3d2cfecbf8da0493d067031ddb079a094 Reviewed-on: https://review.coreboot.org/c/flashrom/+/64746 Tested-by: build bot (Jenkins) Reviewed-by: Nikolai Artemiev Reviewed-by: Arthur Heymans Reviewed-by: Thomas Heijligen --- include/spi.h | 1 - 1 file changed, 1 deletion(-) (limited to 'include/spi.h') diff --git a/include/spi.h b/include/spi.h index 14f71aa0..05d2239a 100644 --- a/include/spi.h +++ b/include/spi.h @@ -156,7 +156,6 @@ #define JEDEC_WRSR 0x01 #define JEDEC_WRSR_OUTSIZE 0x02 #define JEDEC_WRSR_INSIZE 0x00 -#define JEDEC_WRSR_EXT_OUTSIZE 0x03 /* Write Status Register 2 */ #define JEDEC_WRSR2 0x31 -- cgit v1.2.3