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Diffstat (limited to 'testsuite/issues/issue4/counter8.vhdl')
-rw-r--r-- | testsuite/issues/issue4/counter8.vhdl | 23 |
1 files changed, 23 insertions, 0 deletions
diff --git a/testsuite/issues/issue4/counter8.vhdl b/testsuite/issues/issue4/counter8.vhdl new file mode 100644 index 0000000..2067e23 --- /dev/null +++ b/testsuite/issues/issue4/counter8.vhdl @@ -0,0 +1,23 @@ +library ieee; +use ieee.std_logic_1164.all; +use ieee.numeric_std.all; + +entity counter8 is + port (clk : in std_logic; + led0 : out std_logic); +end counter8; + +architecture synth of counter8 is + +begin + + process (clk) + variable temp : unsigned (7 downto 0); + begin + if rising_edge(clk) then + temp:= temp + 1; + led0 <= temp(0); + end if; + end process; + +end synth; |