From bd7e5c9457471bb24d825574c9aa3d9a3af63c03 Mon Sep 17 00:00:00 2001
From: Tristan Gingold <tgingold@free.fr>
Date: Thu, 2 Feb 2017 21:35:01 +0100
Subject: Add examples

---
 icestick/rotate3.vhdl | 38 ++++++++++++++++++++++++++++++++++++++
 1 file changed, 38 insertions(+)
 create mode 100644 icestick/rotate3.vhdl

(limited to 'icestick/rotate3.vhdl')

diff --git a/icestick/rotate3.vhdl b/icestick/rotate3.vhdl
new file mode 100644
index 0000000..213512f
--- /dev/null
+++ b/icestick/rotate3.vhdl
@@ -0,0 +1,38 @@
+architecture rotate3 of leds is
+  signal clk_4hz: std_logic;
+begin
+  process (clk)
+    --  3_000_000 is 0x2dc6c0
+    variable counter : unsigned (23 downto 0);
+  begin
+    if rising_edge(clk) then
+      if counter = 2_999_999 then
+        counter := x"000000";
+        clk_4hz <= '1';
+      else
+        counter := counter + 1;
+        clk_4hz <= '0';
+      end if;
+    end if;
+  end process;
+
+  process (clk)
+    variable count : unsigned (1 downto 0);
+  begin
+    if rising_edge(clk) and clk_4hz = '1' then
+      case count is
+        when "00" =>
+          (led1, led2, led3, led4, led5) <= unsigned'("10001");
+        when "01" =>
+          (led1, led2, led3, led4, led5) <= unsigned'("01000");
+        when "10" =>
+          (led1, led2, led3, led4, led5) <= unsigned'("00101");
+        when "11" =>
+          (led1, led2, led3, led4, led5) <= unsigned'("00010");
+        when others =>
+          null;
+      end case;
+      count := count + 1;
+    end if;
+  end process;
+end rotate3;
-- 
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