From d6a6572439a1f3d7d8c55ae181b978d693ab85d2 Mon Sep 17 00:00:00 2001
From: Tristan Gingold <tgingold@free.fr>
Date: Sat, 2 Oct 2021 19:21:00 +0200
Subject: testsuite: add a test for #158

---
 testsuite/issues/issue158/repro3.vhdl | 26 ++++++++++++++++++++++++++
 1 file changed, 26 insertions(+)
 create mode 100644 testsuite/issues/issue158/repro3.vhdl

(limited to 'testsuite/issues/issue158/repro3.vhdl')

diff --git a/testsuite/issues/issue158/repro3.vhdl b/testsuite/issues/issue158/repro3.vhdl
new file mode 100644
index 0000000..f2cf367
--- /dev/null
+++ b/testsuite/issues/issue158/repro3.vhdl
@@ -0,0 +1,26 @@
+library ieee;
+use ieee.std_logic_1164.all;
+
+entity repro3 is
+  port(
+   clk : in std_logic;
+   inp : std_logic;
+   module_to_clk_cross : out std_ulogic);
+end;
+
+architecture arch of repro3 is
+  type variables_t is record
+    iftrue : std_logic_vector(3 downto 0);
+    inp : std_logic;
+    return_output : std_logic_vector(3 downto 0);
+  end record;
+begin
+  process (clk) is
+    variable read_pipe : variables_t;
+    variable write_pipe : variables_t;
+  begin
+    write_pipe := read_pipe;
+    write_pipe.inp := inp;
+    read_pipe := write_pipe;
+  end process;
+end arch;
-- 
cgit v1.2.3