diff options
| -rw-r--r-- | testsuite/synth/synth38/modulo_test.vhdl | 13 | ||||
| -rwxr-xr-x | testsuite/synth/synth38/testsuite.sh | 11 |
2 files changed, 24 insertions, 0 deletions
diff --git a/testsuite/synth/synth38/modulo_test.vhdl b/testsuite/synth/synth38/modulo_test.vhdl new file mode 100644 index 000000000..8dc8e6a26 --- /dev/null +++ b/testsuite/synth/synth38/modulo_test.vhdl @@ -0,0 +1,13 @@ +entity modulo_test is + port ( + a : in integer; + b : out integer; + c : out integer + ); +end modulo_test; + +architecture rtl of modulo_test is +begin + b <= a mod 8; + c <= a rem 8; +end rtl; diff --git a/testsuite/synth/synth38/testsuite.sh b/testsuite/synth/synth38/testsuite.sh new file mode 100755 index 000000000..243a72f8b --- /dev/null +++ b/testsuite/synth/synth38/testsuite.sh @@ -0,0 +1,11 @@ +#! /bin/sh + +. ../../testenv.sh + +for f in modulo_test; do + synth $f.vhdl -e $f > syn_$f.vhdl +# analyze syn_$f.vhdl +done +clean + +echo "Test successful" |