diff options
| -rw-r--r-- | python/libghdl/thin/vhdl/nodes.py | 162 | ||||
| -rw-r--r-- | src/vhdl/vhdl-ieee-numeric.adb | 36 | ||||
| -rw-r--r-- | src/vhdl/vhdl-nodes.ads | 9 |
3 files changed, 124 insertions, 83 deletions
diff --git a/python/libghdl/thin/vhdl/nodes.py b/python/libghdl/thin/vhdl/nodes.py index 589d37374..140fcb3ab 100644 --- a/python/libghdl/thin/vhdl/nodes.py +++ b/python/libghdl/thin/vhdl/nodes.py @@ -1257,83 +1257,91 @@ class Iir_Predefined: Ieee_Numeric_Std_Shr_Uns_Nat = 274 Ieee_Numeric_Std_Shl_Sgn_Nat = 275 Ieee_Numeric_Std_Shr_Sgn_Nat = 276 - Ieee_Numeric_Std_Rol_Uns_Nat = 277 - Ieee_Numeric_Std_Ror_Uns_Nat = 278 - Ieee_Numeric_Std_Rol_Sgn_Nat = 279 - Ieee_Numeric_Std_Ror_Sgn_Nat = 280 - Ieee_Numeric_Std_Not_Uns = 281 - Ieee_Numeric_Std_Not_Sgn = 282 - Ieee_Numeric_Std_And_Uns_Uns = 283 - Ieee_Numeric_Std_And_Sgn_Sgn = 284 - Ieee_Numeric_Std_Or_Uns_Uns = 285 - Ieee_Numeric_Std_Or_Sgn_Sgn = 286 - Ieee_Numeric_Std_Nand_Uns_Uns = 287 - Ieee_Numeric_Std_Nand_Sgn_Sgn = 288 - Ieee_Numeric_Std_Nor_Uns_Uns = 289 - Ieee_Numeric_Std_Nor_Sgn_Sgn = 290 - Ieee_Numeric_Std_Xor_Uns_Uns = 291 - Ieee_Numeric_Std_Xor_Sgn_Sgn = 292 - Ieee_Numeric_Std_Xnor_Uns_Uns = 293 - Ieee_Numeric_Std_Xnor_Sgn_Sgn = 294 - Ieee_Numeric_Std_Neg_Uns = 295 - Ieee_Numeric_Std_Neg_Sgn = 296 - Ieee_Numeric_Std_Match_Log = 297 - Ieee_Numeric_Std_Match_Uns = 298 - Ieee_Numeric_Std_Match_Sgn = 299 - Ieee_Numeric_Std_Match_Slv = 300 - Ieee_Numeric_Std_Match_Suv = 301 - Ieee_Math_Real_Ceil = 302 - Ieee_Math_Real_Round = 303 - Ieee_Math_Real_Log2 = 304 - Ieee_Math_Real_Sin = 305 - Ieee_Math_Real_Cos = 306 - Ieee_Std_Logic_Unsigned_Add_Slv_Slv = 307 - Ieee_Std_Logic_Unsigned_Add_Slv_Int = 308 - Ieee_Std_Logic_Unsigned_Add_Int_Slv = 309 - Ieee_Std_Logic_Unsigned_Add_Slv_Sl = 310 - Ieee_Std_Logic_Unsigned_Add_Sl_Slv = 311 - Ieee_Std_Logic_Unsigned_Sub_Slv_Slv = 312 - Ieee_Std_Logic_Unsigned_Sub_Slv_Int = 313 - Ieee_Std_Logic_Unsigned_Sub_Int_Slv = 314 - Ieee_Std_Logic_Unsigned_Sub_Slv_Sl = 315 - Ieee_Std_Logic_Unsigned_Sub_Sl_Slv = 316 - Ieee_Std_Logic_Unsigned_Lt_Slv_Slv = 317 - Ieee_Std_Logic_Unsigned_Lt_Slv_Int = 318 - Ieee_Std_Logic_Unsigned_Lt_Int_Slv = 319 - Ieee_Std_Logic_Unsigned_Le_Slv_Slv = 320 - Ieee_Std_Logic_Unsigned_Le_Slv_Int = 321 - Ieee_Std_Logic_Unsigned_Le_Int_Slv = 322 - Ieee_Std_Logic_Unsigned_Gt_Slv_Slv = 323 - Ieee_Std_Logic_Unsigned_Gt_Slv_Int = 324 - Ieee_Std_Logic_Unsigned_Gt_Int_Slv = 325 - Ieee_Std_Logic_Unsigned_Ge_Slv_Slv = 326 - Ieee_Std_Logic_Unsigned_Ge_Slv_Int = 327 - Ieee_Std_Logic_Unsigned_Ge_Int_Slv = 328 - Ieee_Std_Logic_Unsigned_Eq_Slv_Slv = 329 - Ieee_Std_Logic_Unsigned_Eq_Slv_Int = 330 - Ieee_Std_Logic_Unsigned_Eq_Int_Slv = 331 - Ieee_Std_Logic_Unsigned_Ne_Slv_Slv = 332 - Ieee_Std_Logic_Unsigned_Ne_Slv_Int = 333 - Ieee_Std_Logic_Unsigned_Ne_Int_Slv = 334 - Ieee_Std_Logic_Unsigned_Conv_Integer = 335 - Ieee_Std_Logic_Signed_Add_Slv_Slv = 336 - Ieee_Std_Logic_Signed_Add_Slv_Int = 337 - Ieee_Std_Logic_Signed_Add_Int_Slv = 338 - Ieee_Std_Logic_Signed_Add_Slv_Sl = 339 - Ieee_Std_Logic_Signed_Add_Sl_Slv = 340 - Ieee_Std_Logic_Signed_Sub_Slv_Slv = 341 - Ieee_Std_Logic_Signed_Sub_Slv_Int = 342 - Ieee_Std_Logic_Signed_Sub_Int_Slv = 343 - Ieee_Std_Logic_Signed_Sub_Slv_Sl = 344 - Ieee_Std_Logic_Signed_Sub_Sl_Slv = 345 - Ieee_Std_Logic_Arith_Conv_Unsigned_Int = 346 - Ieee_Std_Logic_Arith_Conv_Unsigned_Uns = 347 - Ieee_Std_Logic_Arith_Conv_Unsigned_Sgn = 348 - Ieee_Std_Logic_Arith_Conv_Unsigned_Log = 349 - Ieee_Std_Logic_Arith_Conv_Integer_Int = 350 - Ieee_Std_Logic_Arith_Conv_Integer_Uns = 351 - Ieee_Std_Logic_Arith_Conv_Integer_Sgn = 352 - Ieee_Std_Logic_Arith_Conv_Integer_Log = 353 + Ieee_Numeric_Std_Sll_Uns_Int = 277 + Ieee_Numeric_Std_Sll_Sgn_Int = 278 + Ieee_Numeric_Std_Srl_Uns_Int = 279 + Ieee_Numeric_Std_Srl_Sgn_Int = 280 + Ieee_Numeric_Std_Sla_Uns_Int = 281 + Ieee_Numeric_Std_Sla_Sgn_Int = 282 + Ieee_Numeric_Std_Sra_Uns_Int = 283 + Ieee_Numeric_Std_Sra_Sgn_Int = 284 + Ieee_Numeric_Std_Rol_Uns_Nat = 285 + Ieee_Numeric_Std_Ror_Uns_Nat = 286 + Ieee_Numeric_Std_Rol_Sgn_Nat = 287 + Ieee_Numeric_Std_Ror_Sgn_Nat = 288 + Ieee_Numeric_Std_Not_Uns = 289 + Ieee_Numeric_Std_Not_Sgn = 290 + Ieee_Numeric_Std_And_Uns_Uns = 291 + Ieee_Numeric_Std_And_Sgn_Sgn = 292 + Ieee_Numeric_Std_Or_Uns_Uns = 293 + Ieee_Numeric_Std_Or_Sgn_Sgn = 294 + Ieee_Numeric_Std_Nand_Uns_Uns = 295 + Ieee_Numeric_Std_Nand_Sgn_Sgn = 296 + Ieee_Numeric_Std_Nor_Uns_Uns = 297 + Ieee_Numeric_Std_Nor_Sgn_Sgn = 298 + Ieee_Numeric_Std_Xor_Uns_Uns = 299 + Ieee_Numeric_Std_Xor_Sgn_Sgn = 300 + Ieee_Numeric_Std_Xnor_Uns_Uns = 301 + Ieee_Numeric_Std_Xnor_Sgn_Sgn = 302 + Ieee_Numeric_Std_Neg_Uns = 303 + Ieee_Numeric_Std_Neg_Sgn = 304 + Ieee_Numeric_Std_Match_Log = 305 + Ieee_Numeric_Std_Match_Uns = 306 + Ieee_Numeric_Std_Match_Sgn = 307 + Ieee_Numeric_Std_Match_Slv = 308 + Ieee_Numeric_Std_Match_Suv = 309 + Ieee_Math_Real_Ceil = 310 + Ieee_Math_Real_Round = 311 + Ieee_Math_Real_Log2 = 312 + Ieee_Math_Real_Sin = 313 + Ieee_Math_Real_Cos = 314 + Ieee_Std_Logic_Unsigned_Add_Slv_Slv = 315 + Ieee_Std_Logic_Unsigned_Add_Slv_Int = 316 + Ieee_Std_Logic_Unsigned_Add_Int_Slv = 317 + Ieee_Std_Logic_Unsigned_Add_Slv_Sl = 318 + Ieee_Std_Logic_Unsigned_Add_Sl_Slv = 319 + Ieee_Std_Logic_Unsigned_Sub_Slv_Slv = 320 + Ieee_Std_Logic_Unsigned_Sub_Slv_Int = 321 + Ieee_Std_Logic_Unsigned_Sub_Int_Slv = 322 + Ieee_Std_Logic_Unsigned_Sub_Slv_Sl = 323 + Ieee_Std_Logic_Unsigned_Sub_Sl_Slv = 324 + Ieee_Std_Logic_Unsigned_Lt_Slv_Slv = 325 + Ieee_Std_Logic_Unsigned_Lt_Slv_Int = 326 + Ieee_Std_Logic_Unsigned_Lt_Int_Slv = 327 + Ieee_Std_Logic_Unsigned_Le_Slv_Slv = 328 + Ieee_Std_Logic_Unsigned_Le_Slv_Int = 329 + Ieee_Std_Logic_Unsigned_Le_Int_Slv = 330 + Ieee_Std_Logic_Unsigned_Gt_Slv_Slv = 331 + Ieee_Std_Logic_Unsigned_Gt_Slv_Int = 332 + Ieee_Std_Logic_Unsigned_Gt_Int_Slv = 333 + Ieee_Std_Logic_Unsigned_Ge_Slv_Slv = 334 + Ieee_Std_Logic_Unsigned_Ge_Slv_Int = 335 + Ieee_Std_Logic_Unsigned_Ge_Int_Slv = 336 + Ieee_Std_Logic_Unsigned_Eq_Slv_Slv = 337 + Ieee_Std_Logic_Unsigned_Eq_Slv_Int = 338 + Ieee_Std_Logic_Unsigned_Eq_Int_Slv = 339 + Ieee_Std_Logic_Unsigned_Ne_Slv_Slv = 340 + Ieee_Std_Logic_Unsigned_Ne_Slv_Int = 341 + Ieee_Std_Logic_Unsigned_Ne_Int_Slv = 342 + Ieee_Std_Logic_Unsigned_Conv_Integer = 343 + Ieee_Std_Logic_Signed_Add_Slv_Slv = 344 + Ieee_Std_Logic_Signed_Add_Slv_Int = 345 + Ieee_Std_Logic_Signed_Add_Int_Slv = 346 + Ieee_Std_Logic_Signed_Add_Slv_Sl = 347 + Ieee_Std_Logic_Signed_Add_Sl_Slv = 348 + Ieee_Std_Logic_Signed_Sub_Slv_Slv = 349 + Ieee_Std_Logic_Signed_Sub_Slv_Int = 350 + Ieee_Std_Logic_Signed_Sub_Int_Slv = 351 + Ieee_Std_Logic_Signed_Sub_Slv_Sl = 352 + Ieee_Std_Logic_Signed_Sub_Sl_Slv = 353 + Ieee_Std_Logic_Arith_Conv_Unsigned_Int = 354 + Ieee_Std_Logic_Arith_Conv_Unsigned_Uns = 355 + Ieee_Std_Logic_Arith_Conv_Unsigned_Sgn = 356 + Ieee_Std_Logic_Arith_Conv_Unsigned_Log = 357 + Ieee_Std_Logic_Arith_Conv_Integer_Int = 358 + Ieee_Std_Logic_Arith_Conv_Integer_Uns = 359 + Ieee_Std_Logic_Arith_Conv_Integer_Sgn = 360 + Ieee_Std_Logic_Arith_Conv_Integer_Log = 361 Get_Kind = libghdl.vhdl__nodes__get_kind Get_Location = libghdl.vhdl__nodes__get_location diff --git a/src/vhdl/vhdl-ieee-numeric.adb b/src/vhdl/vhdl-ieee-numeric.adb index c33a2c8e0..2bb43e1f8 100644 --- a/src/vhdl/vhdl-ieee-numeric.adb +++ b/src/vhdl/vhdl-ieee-numeric.adb @@ -322,6 +322,22 @@ package body Vhdl.Ieee.Numeric is (Type_Signed => Iir_Predefined_Ieee_Numeric_Std_Ror_Sgn_Nat, Type_Unsigned => Iir_Predefined_Ieee_Numeric_Std_Ror_Uns_Nat); + Sll_Patterns : constant Shift_Pattern_Type := + (Type_Signed => Iir_Predefined_Ieee_Numeric_Std_Sll_Sgn_Int, + Type_Unsigned => Iir_Predefined_Ieee_Numeric_Std_Sll_Uns_Int); + + Srl_Patterns : constant Shift_Pattern_Type := + (Type_Signed => Iir_Predefined_Ieee_Numeric_Std_Srl_Sgn_Int, + Type_Unsigned => Iir_Predefined_Ieee_Numeric_Std_Srl_Uns_Int); + + Sla_Patterns : constant Shift_Pattern_Type := + (Type_Signed => Iir_Predefined_Ieee_Numeric_Std_Sla_Sgn_Int, + Type_Unsigned => Iir_Predefined_Ieee_Numeric_Std_Sla_Uns_Int); + + Sra_Patterns : constant Shift_Pattern_Type := + (Type_Signed => Iir_Predefined_Ieee_Numeric_Std_Sra_Sgn_Int, + Type_Unsigned => Iir_Predefined_Ieee_Numeric_Std_Sra_Uns_Int); + Error : exception; procedure Extract_Declarations (Pkg_Decl : Iir_Package_Declaration; @@ -515,13 +531,13 @@ package body Vhdl.Ieee.Numeric is Set_Implicit_Definition (Decl, Predefined); end Handle_Std_Match; - procedure Handle_Shift (Pats : Shift_Pattern_Type) + procedure Handle_Shift (Pats : Shift_Pattern_Type; Sh_Sign : Sign_Kind) is Res : Iir_Predefined_Functions; begin if Arg1_Kind = Arg_Vect and then Arg2_Kind = Arg_Scal - and then Arg2_Sign = Type_Unsigned + and then Arg2_Sign = Sh_Sign then case Arg1_Sign is when Type_Signed | Type_Unsigned => @@ -647,13 +663,21 @@ package body Vhdl.Ieee.Numeric is when Name_Std_Match => Handle_Std_Match; when Name_Shift_Left => - Handle_Shift (Shl_Patterns); + Handle_Shift (Shl_Patterns, Type_Unsigned); when Name_Shift_Right => - Handle_Shift (Shr_Patterns); + Handle_Shift (Shr_Patterns, Type_Unsigned); + when Name_Sll => + Handle_Shift (Sll_Patterns, Type_Signed); + when Name_Srl => + Handle_Shift (Srl_Patterns, Type_Signed); + when Name_Sla => + Handle_Shift (Sla_Patterns, Type_Signed); + when Name_Sra => + Handle_Shift (Sra_Patterns, Type_Signed); when Name_Rotate_Left => - Handle_Shift (Rol_Patterns); + Handle_Shift (Rol_Patterns, Type_Unsigned); when Name_Rotate_Right => - Handle_Shift (Ror_Patterns); + Handle_Shift (Ror_Patterns, Type_Unsigned); when others => null; end case; diff --git a/src/vhdl/vhdl-nodes.ads b/src/vhdl/vhdl-nodes.ads index 15e21d738..ca02854fc 100644 --- a/src/vhdl/vhdl-nodes.ads +++ b/src/vhdl/vhdl-nodes.ads @@ -5554,6 +5554,15 @@ package Vhdl.Nodes is Iir_Predefined_Ieee_Numeric_Std_Shl_Sgn_Nat, Iir_Predefined_Ieee_Numeric_Std_Shr_Sgn_Nat, + Iir_Predefined_Ieee_Numeric_Std_Sll_Uns_Int, + Iir_Predefined_Ieee_Numeric_Std_Sll_Sgn_Int, + Iir_Predefined_Ieee_Numeric_Std_Srl_Uns_Int, + Iir_Predefined_Ieee_Numeric_Std_Srl_Sgn_Int, + Iir_Predefined_Ieee_Numeric_Std_Sla_Uns_Int, + Iir_Predefined_Ieee_Numeric_Std_Sla_Sgn_Int, + Iir_Predefined_Ieee_Numeric_Std_Sra_Uns_Int, + Iir_Predefined_Ieee_Numeric_Std_Sra_Sgn_Int, + Iir_Predefined_Ieee_Numeric_Std_Rol_Uns_Nat, Iir_Predefined_Ieee_Numeric_Std_Ror_Uns_Nat, Iir_Predefined_Ieee_Numeric_Std_Rol_Sgn_Nat, |