diff options
| -rw-r--r-- | testsuite/synth/synth80/testcase.vhdl | 16 | ||||
| -rwxr-xr-x | testsuite/synth/synth80/testsuite.sh | 8 |
2 files changed, 24 insertions, 0 deletions
diff --git a/testsuite/synth/synth80/testcase.vhdl b/testsuite/synth/synth80/testcase.vhdl new file mode 100644 index 000000000..49c25340d --- /dev/null +++ b/testsuite/synth/synth80/testcase.vhdl @@ -0,0 +1,16 @@ +library ieee; +use ieee.std_logic_1164.all; + +entity testcase is + generic ( + init_bit : std_logic := '1' + ); +end testcase; + +architecture rtl of testcase is + -- assigning generic to std_logic works OK + signal test_assign : std_logic := init_bit; + -- assigning generic to part of std_logic_vector breaks ghdlsynth + signal test_assign_vector : std_logic_vector(1 downto 0) := init_bit & "0"; +begin +end rtl; diff --git a/testsuite/synth/synth80/testsuite.sh b/testsuite/synth/synth80/testsuite.sh new file mode 100755 index 000000000..6d097693c --- /dev/null +++ b/testsuite/synth/synth80/testsuite.sh @@ -0,0 +1,8 @@ +#! /bin/sh + +. ../../testenv.sh + +synth testcase.vhdl -e > syn_testcase.vhdl +clean + +echo "Test successful" |