diff options
| -rw-r--r-- | pyGHDL/cli/requirements.txt | 2 | ||||
| -rw-r--r-- | pyGHDL/libghdl/vhdl/nodes.py | 358 | ||||
| -rw-r--r-- | src/synth/synth-vhdl_oper.adb | 1 | ||||
| -rw-r--r-- | src/synth/synth-vhdl_stmts.adb | 2 | ||||
| -rw-r--r-- | src/vhdl/vhdl-canon.adb | 97 | ||||
| -rw-r--r-- | src/vhdl/vhdl-canon.ads | 21 | ||||
| -rw-r--r-- | src/vhdl/vhdl-elocations.adb | 2 | ||||
| -rw-r--r-- | src/vhdl/vhdl-elocations.ads | 3 | ||||
| -rw-r--r-- | src/vhdl/vhdl-errors.adb | 6 | ||||
| -rw-r--r-- | src/vhdl/vhdl-nodes.adb | 2 | ||||
| -rw-r--r-- | src/vhdl/vhdl-nodes.ads | 21 | ||||
| -rw-r--r-- | src/vhdl/vhdl-nodes_meta.adb | 221 | ||||
| -rw-r--r-- | src/vhdl/vhdl-utils.adb | 74 | ||||
| -rw-r--r-- | testsuite/synth/issue2062/fxt.vhdl | 15 | ||||
| -rw-r--r-- | testsuite/synth/issue2062/fxt2.vhdl | 14 | ||||
| -rw-r--r-- | testsuite/synth/issue2062/repro.vhdl | 12 | ||||
| -rwxr-xr-x | testsuite/synth/issue2062/testsuite.sh | 10 |
17 files changed, 508 insertions, 353 deletions
diff --git a/pyGHDL/cli/requirements.txt b/pyGHDL/cli/requirements.txt index c377c90f9..9865f70b8 100644 --- a/pyGHDL/cli/requirements.txt +++ b/pyGHDL/cli/requirements.txt @@ -1,5 +1,5 @@ -r ../dom/requirements.txt pyTooling>=1.6.0,<=1.10.0 -pyTooling.TerminalUI>=1.5.3 +pyTooling.TerminalUI>=1.5.3,<=1.5.7 pyAttributes>=2.3.2 diff --git a/pyGHDL/libghdl/vhdl/nodes.py b/pyGHDL/libghdl/vhdl/nodes.py index 619d5c2c4..196b7e811 100644 --- a/pyGHDL/libghdl/vhdl/nodes.py +++ b/pyGHDL/libghdl/vhdl/nodes.py @@ -186,184 +186,186 @@ class Iir_Kind(IntEnum): Interface_Function_Declaration = 139 Interface_Procedure_Declaration = 140 Signal_Attribute_Declaration = 141 - Identity_Operator = 142 - Negation_Operator = 143 - Absolute_Operator = 144 - Not_Operator = 145 - Implicit_Condition_Operator = 146 - Condition_Operator = 147 - Reduction_And_Operator = 148 - Reduction_Or_Operator = 149 - Reduction_Nand_Operator = 150 - Reduction_Nor_Operator = 151 - Reduction_Xor_Operator = 152 - Reduction_Xnor_Operator = 153 - And_Operator = 154 - Or_Operator = 155 - Nand_Operator = 156 - Nor_Operator = 157 - Xor_Operator = 158 - Xnor_Operator = 159 - Equality_Operator = 160 - Inequality_Operator = 161 - Less_Than_Operator = 162 - Less_Than_Or_Equal_Operator = 163 - Greater_Than_Operator = 164 - Greater_Than_Or_Equal_Operator = 165 - Match_Equality_Operator = 166 - Match_Inequality_Operator = 167 - Match_Less_Than_Operator = 168 - Match_Less_Than_Or_Equal_Operator = 169 - Match_Greater_Than_Operator = 170 - Match_Greater_Than_Or_Equal_Operator = 171 - Sll_Operator = 172 - Sla_Operator = 173 - Srl_Operator = 174 - Sra_Operator = 175 - Rol_Operator = 176 - Ror_Operator = 177 - Addition_Operator = 178 - Substraction_Operator = 179 - Concatenation_Operator = 180 - Multiplication_Operator = 181 - Division_Operator = 182 - Modulus_Operator = 183 - Remainder_Operator = 184 - Exponentiation_Operator = 185 - Function_Call = 186 - Aggregate = 187 - Parenthesis_Expression = 188 - Qualified_Expression = 189 - Type_Conversion = 190 - Allocator_By_Expression = 191 - Allocator_By_Subtype = 192 - Selected_Element = 193 - Dereference = 194 - Implicit_Dereference = 195 - Slice_Name = 196 - Indexed_Name = 197 - Psl_Prev = 198 - Psl_Stable = 199 - Psl_Rose = 200 - Psl_Fell = 201 - Psl_Onehot = 202 - Psl_Onehot0 = 203 - Psl_Expression = 204 - Sensitized_Process_Statement = 205 - Process_Statement = 206 - Concurrent_Simple_Signal_Assignment = 207 - Concurrent_Conditional_Signal_Assignment = 208 - Concurrent_Selected_Signal_Assignment = 209 - Concurrent_Assertion_Statement = 210 - Concurrent_Procedure_Call_Statement = 211 - Concurrent_Break_Statement = 212 - Psl_Assert_Directive = 213 - Psl_Assume_Directive = 214 - Psl_Cover_Directive = 215 - Psl_Restrict_Directive = 216 - Block_Statement = 217 - If_Generate_Statement = 218 - Case_Generate_Statement = 219 - For_Generate_Statement = 220 - Component_Instantiation_Statement = 221 - Psl_Default_Clock = 222 - Generate_Statement_Body = 223 - If_Generate_Else_Clause = 224 - Simple_Simultaneous_Statement = 225 - Simultaneous_Null_Statement = 226 - Simultaneous_Procedural_Statement = 227 - Simultaneous_Case_Statement = 228 - Simultaneous_If_Statement = 229 - Simultaneous_Elsif = 230 - Simple_Signal_Assignment_Statement = 231 - Conditional_Signal_Assignment_Statement = 232 - Selected_Waveform_Assignment_Statement = 233 - Signal_Force_Assignment_Statement = 234 - Signal_Release_Assignment_Statement = 235 - Null_Statement = 236 - Assertion_Statement = 237 - Report_Statement = 238 - Wait_Statement = 239 - Variable_Assignment_Statement = 240 - Conditional_Variable_Assignment_Statement = 241 - Return_Statement = 242 - For_Loop_Statement = 243 - While_Loop_Statement = 244 - Next_Statement = 245 - Exit_Statement = 246 - Case_Statement = 247 - Procedure_Call_Statement = 248 - Break_Statement = 249 - If_Statement = 250 - Elsif = 251 - Character_Literal = 252 - Simple_Name = 253 - Selected_Name = 254 - Operator_Symbol = 255 - Reference_Name = 256 - External_Constant_Name = 257 - External_Signal_Name = 258 - External_Variable_Name = 259 - Selected_By_All_Name = 260 - Parenthesis_Name = 261 - Package_Pathname = 262 - Absolute_Pathname = 263 - Relative_Pathname = 264 - Pathname_Element = 265 - Base_Attribute = 266 - Subtype_Attribute = 267 - Element_Attribute = 268 - Across_Attribute = 269 - Through_Attribute = 270 - Nature_Reference_Attribute = 271 - Left_Type_Attribute = 272 - Right_Type_Attribute = 273 - High_Type_Attribute = 274 - Low_Type_Attribute = 275 - Ascending_Type_Attribute = 276 - Image_Attribute = 277 - Value_Attribute = 278 - Pos_Attribute = 279 - Val_Attribute = 280 - Succ_Attribute = 281 - Pred_Attribute = 282 - Leftof_Attribute = 283 - Rightof_Attribute = 284 - Signal_Slew_Attribute = 285 - Quantity_Slew_Attribute = 286 - Ramp_Attribute = 287 - Zoh_Attribute = 288 - Ltf_Attribute = 289 - Ztf_Attribute = 290 - Dot_Attribute = 291 - Integ_Attribute = 292 - Above_Attribute = 293 - Quantity_Delayed_Attribute = 294 - Delayed_Attribute = 295 - Stable_Attribute = 296 - Quiet_Attribute = 297 - Transaction_Attribute = 298 - Event_Attribute = 299 - Active_Attribute = 300 - Last_Event_Attribute = 301 - Last_Active_Attribute = 302 - Last_Value_Attribute = 303 - Driving_Attribute = 304 - Driving_Value_Attribute = 305 - Behavior_Attribute = 306 - Structure_Attribute = 307 - Simple_Name_Attribute = 308 - Instance_Name_Attribute = 309 - Path_Name_Attribute = 310 - Left_Array_Attribute = 311 - Right_Array_Attribute = 312 - High_Array_Attribute = 313 - Low_Array_Attribute = 314 - Length_Array_Attribute = 315 - Ascending_Array_Attribute = 316 - Range_Array_Attribute = 317 - Reverse_Range_Array_Attribute = 318 - Attribute_Name = 319 + Suspend_State_Declaration = 142 + Identity_Operator = 143 + Negation_Operator = 144 + Absolute_Operator = 145 + Not_Operator = 146 + Implicit_Condition_Operator = 147 + Condition_Operator = 148 + Reduction_And_Operator = 149 + Reduction_Or_Operator = 150 + Reduction_Nand_Operator = 151 + Reduction_Nor_Operator = 152 + Reduction_Xor_Operator = 153 + Reduction_Xnor_Operator = 154 + And_Operator = 155 + Or_Operator = 156 + Nand_Operator = 157 + Nor_Operator = 158 + Xor_Operator = 159 + Xnor_Operator = 160 + Equality_Operator = 161 + Inequality_Operator = 162 + Less_Than_Operator = 163 + Less_Than_Or_Equal_Operator = 164 + Greater_Than_Operator = 165 + Greater_Than_Or_Equal_Operator = 166 + Match_Equality_Operator = 167 + Match_Inequality_Operator = 168 + Match_Less_Than_Operator = 169 + Match_Less_Than_Or_Equal_Operator = 170 + Match_Greater_Than_Operator = 171 + Match_Greater_Than_Or_Equal_Operator = 172 + Sll_Operator = 173 + Sla_Operator = 174 + Srl_Operator = 175 + Sra_Operator = 176 + Rol_Operator = 177 + Ror_Operator = 178 + Addition_Operator = 179 + Substraction_Operator = 180 + Concatenation_Operator = 181 + Multiplication_Operator = 182 + Division_Operator = 183 + Modulus_Operator = 184 + Remainder_Operator = 185 + Exponentiation_Operator = 186 + Function_Call = 187 + Aggregate = 188 + Parenthesis_Expression = 189 + Qualified_Expression = 190 + Type_Conversion = 191 + Allocator_By_Expression = 192 + Allocator_By_Subtype = 193 + Selected_Element = 194 + Dereference = 195 + Implicit_Dereference = 196 + Slice_Name = 197 + Indexed_Name = 198 + Psl_Prev = 199 + Psl_Stable = 200 + Psl_Rose = 201 + Psl_Fell = 202 + Psl_Onehot = 203 + Psl_Onehot0 = 204 + Psl_Expression = 205 + Sensitized_Process_Statement = 206 + Process_Statement = 207 + Concurrent_Simple_Signal_Assignment = 208 + Concurrent_Conditional_Signal_Assignment = 209 + Concurrent_Selected_Signal_Assignment = 210 + Concurrent_Assertion_Statement = 211 + Concurrent_Procedure_Call_Statement = 212 + Concurrent_Break_Statement = 213 + Psl_Assert_Directive = 214 + Psl_Assume_Directive = 215 + Psl_Cover_Directive = 216 + Psl_Restrict_Directive = 217 + Block_Statement = 218 + If_Generate_Statement = 219 + Case_Generate_Statement = 220 + For_Generate_Statement = 221 + Component_Instantiation_Statement = 222 + Psl_Default_Clock = 223 + Generate_Statement_Body = 224 + If_Generate_Else_Clause = 225 + Simple_Simultaneous_Statement = 226 + Simultaneous_Null_Statement = 227 + Simultaneous_Procedural_Statement = 228 + Simultaneous_Case_Statement = 229 + Simultaneous_If_Statement = 230 + Simultaneous_Elsif = 231 + Simple_Signal_Assignment_Statement = 232 + Conditional_Signal_Assignment_Statement = 233 + Selected_Waveform_Assignment_Statement = 234 + Signal_Force_Assignment_Statement = 235 + Signal_Release_Assignment_Statement = 236 + Null_Statement = 237 + Assertion_Statement = 238 + Report_Statement = 239 + Wait_Statement = 240 + Variable_Assignment_Statement = 241 + Conditional_Variable_Assignment_Statement = 242 + Return_Statement = 243 + For_Loop_Statement = 244 + While_Loop_Statement = 245 + Next_Statement = 246 + Exit_Statement = 247 + Case_Statement = 248 + Procedure_Call_Statement = 249 + Break_Statement = 250 + If_Statement = 251 + Elsif = 252 + Suspend_State_Statement = 253 + Character_Literal = 254 + Simple_Name = 255 + Selected_Name = 256 + Operator_Symbol = 257 + Reference_Name = 258 + External_Constant_Name = 259 + External_Signal_Name = 260 + External_Variable_Name = 261 + Selected_By_All_Name = 262 + Parenthesis_Name = 263 + Package_Pathname = 264 + Absolute_Pathname = 265 + Relative_Pathname = 266 + Pathname_Element = 267 + Base_Attribute = 268 + Subtype_Attribute = 269 + Element_Attribute = 270 + Across_Attribute = 271 + Through_Attribute = 272 + Nature_Reference_Attribute = 273 + Left_Type_Attribute = 274 + Right_Type_Attribute = 275 + High_Type_Attribute = 276 + Low_Type_Attribute = 277 + Ascending_Type_Attribute = 278 + Image_Attribute = 279 + Value_Attribute = 280 + Pos_Attribute = 281 + Val_Attribute = 282 + Succ_Attribute = 283 + Pred_Attribute = 284 + Leftof_Attribute = 285 + Rightof_Attribute = 286 + Signal_Slew_Attribute = 287 + Quantity_Slew_Attribute = 288 + Ramp_Attribute = 289 + Zoh_Attribute = 290 + Ltf_Attribute = 291 + Ztf_Attribute = 292 + Dot_Attribute = 293 + Integ_Attribute = 294 + Above_Attribute = 295 + Quantity_Delayed_Attribute = 296 + Delayed_Attribute = 297 + Stable_Attribute = 298 + Quiet_Attribute = 299 + Transaction_Attribute = 300 + Event_Attribute = 301 + Active_Attribute = 302 + Last_Event_Attribute = 303 + Last_Active_Attribute = 304 + Last_Value_Attribute = 305 + Driving_Attribute = 306 + Driving_Value_Attribute = 307 + Behavior_Attribute = 308 + Structure_Attribute = 309 + Simple_Name_Attribute = 310 + Instance_Name_Attribute = 311 + Path_Name_Attribute = 312 + Left_Array_Attribute = 313 + Right_Array_Attribute = 314 + High_Array_Attribute = 315 + Low_Array_Attribute = 316 + Length_Array_Attribute = 317 + Ascending_Array_Attribute = 318 + Range_Array_Attribute = 319 + Reverse_Range_Array_Attribute = 320 + Attribute_Name = 321 @export diff --git a/src/synth/synth-vhdl_oper.adb b/src/synth/synth-vhdl_oper.adb index 640a65b77..813a5513d 100644 --- a/src/synth/synth-vhdl_oper.adb +++ b/src/synth/synth-vhdl_oper.adb @@ -1937,6 +1937,7 @@ package body Synth.Vhdl_Oper is when Iir_Predefined_Ieee_1164_To_Bitvector | Iir_Predefined_Ieee_1164_To_Stdlogicvector_Suv | Iir_Predefined_Ieee_1164_To_Stdlogicvector_Bv + | Iir_Predefined_Ieee_1164_To_Stdulogicvector_Slv | Iir_Predefined_Ieee_1164_To_Stdulogicvector_Bv | Iir_Predefined_Ieee_Numeric_Std_To_01_Uns | Iir_Predefined_Ieee_Numeric_Std_To_01_Sgn diff --git a/src/synth/synth-vhdl_stmts.adb b/src/synth/synth-vhdl_stmts.adb index 6fa2e9227..53e7a2ee4 100644 --- a/src/synth/synth-vhdl_stmts.adb +++ b/src/synth/synth-vhdl_stmts.adb @@ -3082,6 +3082,8 @@ package body Synth.Vhdl_Stmts is when Iir_Kind_Procedure_Call_Statement => Synth_Procedure_Call (C.Inst, Stmt); when Iir_Kind_Report_Statement => + -- TODO: handle report statements from ieee library (at least + -- fixed pkg). They are known to be OK (tbc) and useful. if not Is_Dyn then Synth_Static_Report_Statement (C, Stmt); end if; diff --git a/src/vhdl/vhdl-canon.adb b/src/vhdl/vhdl-canon.adb index d37f26493..70e5ea945 100644 --- a/src/vhdl/vhdl-canon.adb +++ b/src/vhdl/vhdl-canon.adb @@ -334,7 +334,7 @@ package body Vhdl.Canon is end Canon_Extract_Sensitivity_If_Not_Null; procedure Canon_Extract_Sensitivity_Procedure_Call - (Sensitivity_List : Iir_List; Call : Iir) + (Call : Iir; Sensitivity_List : Iir_List) is Assoc : Iir; Inter : Iir; @@ -365,6 +365,65 @@ package body Vhdl.Canon is end loop; end Canon_Extract_Sensitivity_Waveform; + procedure Canon_Extract_Sensitivity_Signal_Assignment_Common + (Stmt : Iir; List : Iir_List) is + begin + Canon_Extract_Sensitivity_Expression (Get_Target (Stmt), List, True); + Canon_Extract_Sensitivity_If_Not_Null + (Get_Reject_Time_Expression (Stmt), List); + end Canon_Extract_Sensitivity_Signal_Assignment_Common; + + procedure Canon_Extract_Sensitivity_Conditional_Signal_Assignment + (Stmt : Iir; List : Iir_List) + is + Cwe : Iir; + begin + Canon_Extract_Sensitivity_Signal_Assignment_Common (Stmt, List); + Cwe := Get_Conditional_Waveform_Chain (Stmt); + while Cwe /= Null_Iir loop + Canon_Extract_Sensitivity_If_Not_Null (Get_Condition (Cwe), List); + Canon_Extract_Sensitivity_Waveform (Get_Waveform_Chain (Cwe), List); + Cwe := Get_Chain (Cwe); + end loop; + end Canon_Extract_Sensitivity_Conditional_Signal_Assignment; + + procedure Canon_Extract_Sensitivity_Simple_Signal_Assignment + (Stmt : Iir; List : Iir_List) is + begin + Canon_Extract_Sensitivity_Signal_Assignment_Common (Stmt, List); + Canon_Extract_Sensitivity_Waveform (Get_Waveform_Chain (Stmt), List); + end Canon_Extract_Sensitivity_Simple_Signal_Assignment; + + procedure Canon_Extract_Sensitivity_Selected_Signal_Assignment + (Stmt : Iir; List : Iir_List) + is + Swf : Node; + Wf : Node; + begin + Canon_Extract_Sensitivity_Signal_Assignment_Common (Stmt, List); + Canon_Extract_Sensitivity_Expression (Get_Expression (Stmt), List); + + Swf := Get_Selected_Waveform_Chain (Stmt); + while Swf /= Null_Node loop + Wf := Get_Associated_Chain (Swf); + if Wf /= Null_Iir then + Canon_Extract_Sensitivity_Waveform (Wf, List); + end if; + Swf := Get_Chain (Swf); + end loop; + end Canon_Extract_Sensitivity_Selected_Signal_Assignment; + + procedure Canon_Extract_Sensitivity_Assertion_Statement + (Stmt : Iir; List : Iir_List) is + begin + Canon_Extract_Sensitivity_Expression + (Get_Assertion_Condition (Stmt), List); + Canon_Extract_Sensitivity_If_Not_Null + (Get_Severity_Expression (Stmt), List); + Canon_Extract_Sensitivity_If_Not_Null + (Get_Report_Expression (Stmt), List); + end Canon_Extract_Sensitivity_Assertion_Statement; + procedure Canon_Extract_Sensitivity_Statement (Stmt : Iir; List : Iir_List) is begin @@ -375,12 +434,7 @@ package body Vhdl.Canon is -- statement, apply the rule of 10.2 to each expression -- in the statement, and construct the union of the -- resulting sets. - Canon_Extract_Sensitivity_Expression - (Get_Assertion_Condition (Stmt), List); - Canon_Extract_Sensitivity_If_Not_Null - (Get_Severity_Expression (Stmt), List); - Canon_Extract_Sensitivity_If_Not_Null - (Get_Report_Expression (Stmt), List); + Canon_Extract_Sensitivity_Assertion_Statement (Stmt, List); when Iir_Kind_Report_Statement => -- LRM08 11.3 -- See assertion_statement case. @@ -412,29 +466,10 @@ package body Vhdl.Canon is when Iir_Kind_Simple_Signal_Assignment_Statement => -- LRM08 11.3 -- See variable assignment statement case. - Canon_Extract_Sensitivity_Expression - (Get_Target (Stmt), List, True); - Canon_Extract_Sensitivity_If_Not_Null - (Get_Reject_Time_Expression (Stmt), List); - Canon_Extract_Sensitivity_Waveform - (Get_Waveform_Chain (Stmt), List); + Canon_Extract_Sensitivity_Simple_Signal_Assignment (Stmt, List); when Iir_Kind_Conditional_Signal_Assignment_Statement => - Canon_Extract_Sensitivity_Expression - (Get_Target (Stmt), List, True); - Canon_Extract_Sensitivity_If_Not_Null - (Get_Reject_Time_Expression (Stmt), List); - declare - Cwe : Iir; - begin - Cwe := Get_Conditional_Waveform_Chain (Stmt); - while Cwe /= Null_Iir loop - Canon_Extract_Sensitivity_If_Not_Null - (Get_Condition (Cwe), List); - Canon_Extract_Sensitivity_Waveform - (Get_Waveform_Chain (Cwe), List); - Cwe := Get_Chain (Cwe); - end loop; - end; + Canon_Extract_Sensitivity_Conditional_Signal_Assignment + (Stmt, List); when Iir_Kind_If_Statement => -- LRM08 11.3 -- * For each if statement, apply the rule of 10.2 to the @@ -509,7 +544,7 @@ package body Vhdl.Canon is -- with each formal parameter of mode IN or INOUT, and -- construct the union of the resulting sets. Canon_Extract_Sensitivity_Procedure_Call - (List, Get_Procedure_Call (Stmt)); + (Get_Procedure_Call (Stmt), List); when others => Error_Kind ("canon_extract_sensitivity_statement", Stmt); end case; @@ -1428,7 +1463,7 @@ package body Vhdl.Canon is -- the union of the sets constructed by applying th rule of Section 8.1 -- to each actual part associated with a formal parameter. Sensitivity_List := Create_Iir_List; - Canon_Extract_Sensitivity_Procedure_Call (Sensitivity_List, Call); + Canon_Extract_Sensitivity_Procedure_Call (Call, Sensitivity_List); if Is_Sensitized then Set_Sensitivity_List (Proc, Sensitivity_List); Set_Is_Ref (Proc, True); diff --git a/src/vhdl/vhdl-canon.ads b/src/vhdl/vhdl-canon.ads index 2c9178257..3c47a3cae 100644 --- a/src/vhdl/vhdl-canon.ads +++ b/src/vhdl/vhdl-canon.ads @@ -95,4 +95,25 @@ package Vhdl.Canon is -- Used for vhdl 08. function Canon_Extract_Sensitivity_Process (Proc : Iir_Sensitized_Process_Statement) return Iir_List; + + -- For a concurrent or sequential conditional signal assignment. + procedure Canon_Extract_Sensitivity_Conditional_Signal_Assignment + (Stmt : Iir; List : Iir_List); + + -- For a concurrent or sequential simple signal assignment. + procedure Canon_Extract_Sensitivity_Simple_Signal_Assignment + (Stmt : Iir; List : Iir_List); + + -- For a concurrent selected signal statement. + procedure Canon_Extract_Sensitivity_Selected_Signal_Assignment + (Stmt : Iir; List : Iir_List); + + -- For a concurrent or sequential simple assertion statement. + procedure Canon_Extract_Sensitivity_Assertion_Statement + (Stmt : Iir; List : Iir_List); + + -- For a procedure call. + procedure Canon_Extract_Sensitivity_Procedure_Call + (Call : Iir; Sensitivity_List : Iir_List); + end Vhdl.Canon; diff --git a/src/vhdl/vhdl-elocations.adb b/src/vhdl/vhdl-elocations.adb index dbd610d3c..b428c4fab 100644 --- a/src/vhdl/vhdl-elocations.adb +++ b/src/vhdl/vhdl-elocations.adb @@ -297,6 +297,7 @@ package body Vhdl.Elocations is | Iir_Kind_Interface_Function_Declaration | Iir_Kind_Interface_Procedure_Declaration | Iir_Kind_Signal_Attribute_Declaration + | Iir_Kind_Suspend_State_Declaration | Iir_Kind_Identity_Operator | Iir_Kind_Negation_Operator | Iir_Kind_Absolute_Operator @@ -386,6 +387,7 @@ package body Vhdl.Elocations is | Iir_Kind_Exit_Statement | Iir_Kind_Procedure_Call_Statement | Iir_Kind_Break_Statement + | Iir_Kind_Suspend_State_Statement | Iir_Kind_Character_Literal | Iir_Kind_Simple_Name | Iir_Kind_Selected_Name diff --git a/src/vhdl/vhdl-elocations.ads b/src/vhdl/vhdl-elocations.ads index eaa1f78a1..810507a9f 100644 --- a/src/vhdl/vhdl-elocations.ads +++ b/src/vhdl/vhdl-elocations.ads @@ -280,6 +280,7 @@ package Vhdl.Elocations is -- Iir_Kind_Guard_Signal_Declaration (None) -- Iir_Kind_Signal_Attribute_Declaration (None) + -- Iir_Kind_Suspend_State_Declaration (None) -- Iir_Kind_Constant_Declaration (L1) -- Iir_Kind_Iterator_Declaration (L1) @@ -566,6 +567,8 @@ package Vhdl.Elocations is -- Iir_Kind_Break_Element (None) + -- Iir_Kind_Suspend_State_Statement (None) + ---------------- -- operators -- ---------------- diff --git a/src/vhdl/vhdl-errors.adb b/src/vhdl/vhdl-errors.adb index ddb2a9868..3388fcde8 100644 --- a/src/vhdl/vhdl-errors.adb +++ b/src/vhdl/vhdl-errors.adb @@ -495,6 +495,9 @@ package body Vhdl.Errors is when Iir_Kind_Signal_Attribute_Declaration => -- Should not appear. return "signal attribute"; + when Iir_Kind_Suspend_State_Declaration => + -- Should not appear. + return "suspend state variable"; when Iir_Kind_Group_Template_Declaration => return Disp_Identifier (Node, "group template"); when Iir_Kind_Group_Declaration => @@ -841,6 +844,9 @@ package body Vhdl.Errors is return Disp_Label (Node, "report statement"); when Iir_Kind_Break_Statement => return Disp_Label (Node, "break statement"); + when Iir_Kind_Suspend_State_Statement => + -- Should not appear. + return "suspend state statement"; when Iir_Kind_Block_Configuration => return "block configuration"; diff --git a/src/vhdl/vhdl-nodes.adb b/src/vhdl/vhdl-nodes.adb index 947cd771d..360fdbec5 100644 --- a/src/vhdl/vhdl-nodes.adb +++ b/src/vhdl/vhdl-nodes.adb @@ -1083,6 +1083,7 @@ package body Vhdl.Nodes is | Iir_Kind_Interface_Terminal_Declaration | Iir_Kind_Interface_Type_Declaration | Iir_Kind_Signal_Attribute_Declaration + | Iir_Kind_Suspend_State_Declaration | Iir_Kind_Identity_Operator | Iir_Kind_Negation_Operator | Iir_Kind_Absolute_Operator @@ -1178,6 +1179,7 @@ package body Vhdl.Nodes is | Iir_Kind_Break_Statement | Iir_Kind_If_Statement | Iir_Kind_Elsif + | Iir_Kind_Suspend_State_Statement | Iir_Kind_Character_Literal | Iir_Kind_Simple_Name | Iir_Kind_Selected_Name diff --git a/src/vhdl/vhdl-nodes.ads b/src/vhdl/vhdl-nodes.ads index 1e97286d0..0dd339ef1 100644 --- a/src/vhdl/vhdl-nodes.ads +++ b/src/vhdl/vhdl-nodes.ads @@ -1602,12 +1602,14 @@ package Vhdl.Nodes is -- -- Get/Set_Implicit_Definition (Field7) -- + -- Only for Iir_Kind_Function_Declaration: -- Get/Set_Return_Type_Mark (Field8) -- -- Get/Set_Subprogram_Body (Field9) -- -- Get/Set_Subprogram_Depth (Field10) -- + -- Only for Iir_Kind_Function_Declaration: -- Get/Set_Return_Identifier (Field11) -- -- Get/Set_Overload_Number (Field12) @@ -1872,6 +1874,15 @@ package Vhdl.Nodes is -- Chain of signals -- Get/Set_Signal_Attribute_Chain (Field3) + -- Iir_Kind_Suspend_State_Declaration (Short) + -- + -- Implicit state variable to handle suspension. Added after semantic + -- analysis. + -- + -- Get/Set_Parent (Field0) + -- + -- Get/Set_Chain (Field2) + -- Iir_Kind_Constant_Declaration (Medium) -- Iir_Kind_Iterator_Declaration (Short) -- @@ -4122,6 +4133,14 @@ package Vhdl.Nodes is -- -- Get/Set_Expression (Field5) + -- Iir_Kind_Suspend_State_Statement (Short) + -- + -- Implicit statement added to mark a suspend point. + -- + -- Get/Set_Parent (Field0) + -- + -- Get/Set_Chain (Field2) + ---------------- -- operators -- ---------------- @@ -4998,6 +5017,7 @@ package Vhdl.Nodes is Iir_Kind_Interface_Procedure_Declaration, -- interface Iir_Kind_Signal_Attribute_Declaration, + Iir_Kind_Suspend_State_Declaration, -- Expressions. Iir_Kind_Identity_Operator, @@ -5118,6 +5138,7 @@ package Vhdl.Nodes is Iir_Kind_Break_Statement, Iir_Kind_If_Statement, Iir_Kind_Elsif, + Iir_Kind_Suspend_State_Statement, -- Names Iir_Kind_Character_Literal, -- denoting_name diff --git a/src/vhdl/vhdl-nodes_meta.adb b/src/vhdl/vhdl-nodes_meta.adb index 9fd729275..410e4b9eb 100644 --- a/src/vhdl/vhdl-nodes_meta.adb +++ b/src/vhdl/vhdl-nodes_meta.adb @@ -1436,6 +1436,8 @@ package body Vhdl.Nodes_Meta is return "interface_procedure_declaration"; when Iir_Kind_Signal_Attribute_Declaration => return "signal_attribute_declaration"; + when Iir_Kind_Suspend_State_Declaration => + return "suspend_state_declaration"; when Iir_Kind_Identity_Operator => return "identity_operator"; when Iir_Kind_Negation_Operator => @@ -1656,6 +1658,8 @@ package body Vhdl.Nodes_Meta is return "if_statement"; when Iir_Kind_Elsif => return "elsif"; + when Iir_Kind_Suspend_State_Statement => + return "suspend_state_statement"; when Iir_Kind_Character_Literal => return "character_literal"; when Iir_Kind_Simple_Name => @@ -3517,9 +3521,7 @@ package body Vhdl.Nodes_Meta is Field_Chain, Field_Interface_Declaration_Chain, Field_Generic_Chain, - Field_Return_Type_Mark, Field_Subprogram_Body, - Field_Return_Identifier, -- Iir_Kind_Function_Body Field_Impure_Depth, Field_End_Has_Reserved_Id, @@ -3922,6 +3924,9 @@ package body Vhdl.Nodes_Meta is Field_Parent, Field_Chain, Field_Signal_Attribute_Chain, + -- Iir_Kind_Suspend_State_Declaration + Field_Parent, + Field_Chain, -- Iir_Kind_Identity_Operator Field_Expr_Staticness, Field_Type, @@ -4783,6 +4788,9 @@ package body Vhdl.Nodes_Meta is Field_Condition, Field_Sequential_Statement_Chain, Field_Else_Clause, + -- Iir_Kind_Suspend_State_Statement + Field_Parent, + Field_Chain, -- Iir_Kind_Character_Literal Field_Identifier, Field_Is_Forward_Ref, @@ -5375,35 +5383,36 @@ package body Vhdl.Nodes_Meta is Iir_Kind_Psl_Endpoint_Declaration => 793, Iir_Kind_Enumeration_Literal => 805, Iir_Kind_Function_Declaration => 831, - Iir_Kind_Procedure_Declaration => 856, - Iir_Kind_Function_Body => 866, - Iir_Kind_Procedure_Body => 877, - Iir_Kind_Function_Instantiation_Declaration => 888, - Iir_Kind_Procedure_Instantiation_Declaration => 898, - Iir_Kind_Terminal_Declaration => 907, - Iir_Kind_Object_Alias_Declaration => 919, - Iir_Kind_Free_Quantity_Declaration => 931, - Iir_Kind_Spectrum_Quantity_Declaration => 944, - Iir_Kind_Noise_Quantity_Declaration => 956, - Iir_Kind_Across_Quantity_Declaration => 972, - Iir_Kind_Through_Quantity_Declaration => 988, - Iir_Kind_File_Declaration => 1003, - Iir_Kind_Guard_Signal_Declaration => 1017, - Iir_Kind_Signal_Declaration => 1034, - Iir_Kind_Variable_Declaration => 1047, - Iir_Kind_Constant_Declaration => 1061, - Iir_Kind_Iterator_Declaration => 1073, - Iir_Kind_Interface_Constant_Declaration => 1090, - Iir_Kind_Interface_Variable_Declaration => 1106, - Iir_Kind_Interface_Signal_Declaration => 1127, - Iir_Kind_Interface_File_Declaration => 1143, - Iir_Kind_Interface_Quantity_Declaration => 1159, - Iir_Kind_Interface_Terminal_Declaration => 1171, - Iir_Kind_Interface_Type_Declaration => 1182, - Iir_Kind_Interface_Package_Declaration => 1195, - Iir_Kind_Interface_Function_Declaration => 1213, - Iir_Kind_Interface_Procedure_Declaration => 1227, - Iir_Kind_Signal_Attribute_Declaration => 1230, + Iir_Kind_Procedure_Declaration => 854, + Iir_Kind_Function_Body => 864, + Iir_Kind_Procedure_Body => 875, + Iir_Kind_Function_Instantiation_Declaration => 886, + Iir_Kind_Procedure_Instantiation_Declaration => 896, + Iir_Kind_Terminal_Declaration => 905, + Iir_Kind_Object_Alias_Declaration => 917, + Iir_Kind_Free_Quantity_Declaration => 929, + Iir_Kind_Spectrum_Quantity_Declaration => 942, + Iir_Kind_Noise_Quantity_Declaration => 954, + Iir_Kind_Across_Quantity_Declaration => 970, + Iir_Kind_Through_Quantity_Declaration => 986, + Iir_Kind_File_Declaration => 1001, + Iir_Kind_Guard_Signal_Declaration => 1015, + Iir_Kind_Signal_Declaration => 1032, + Iir_Kind_Variable_Declaration => 1045, + Iir_Kind_Constant_Declaration => 1059, + Iir_Kind_Iterator_Declaration => 1071, + Iir_Kind_Interface_Constant_Declaration => 1088, + Iir_Kind_Interface_Variable_Declaration => 1104, + Iir_Kind_Interface_Signal_Declaration => 1125, + Iir_Kind_Interface_File_Declaration => 1141, + Iir_Kind_Interface_Quantity_Declaration => 1157, + Iir_Kind_Interface_Terminal_Declaration => 1169, + Iir_Kind_Interface_Type_Declaration => 1180, + Iir_Kind_Interface_Package_Declaration => 1193, + Iir_Kind_Interface_Function_Declaration => 1211, + Iir_Kind_Interface_Procedure_Declaration => 1225, + Iir_Kind_Signal_Attribute_Declaration => 1228, + Iir_Kind_Suspend_State_Declaration => 1230, Iir_Kind_Identity_Operator => 1234, Iir_Kind_Negation_Operator => 1238, Iir_Kind_Absolute_Operator => 1242, @@ -5514,74 +5523,75 @@ package body Vhdl.Nodes_Meta is Iir_Kind_Break_Statement => 1965, Iir_Kind_If_Statement => 1975, Iir_Kind_Elsif => 1981, - Iir_Kind_Character_Literal => 1988, - Iir_Kind_Simple_Name => 1995, - Iir_Kind_Selected_Name => 2003, - Iir_Kind_Operator_Symbol => 2008, - Iir_Kind_Reference_Name => 2013, - Iir_Kind_External_Constant_Name => 2022, - Iir_Kind_External_Signal_Name => 2031, - Iir_Kind_External_Variable_Name => 2041, - Iir_Kind_Selected_By_All_Name => 2047, - Iir_Kind_Parenthesis_Name => 2052, - Iir_Kind_Package_Pathname => 2056, - Iir_Kind_Absolute_Pathname => 2057, - Iir_Kind_Relative_Pathname => 2058, - Iir_Kind_Pathname_Element => 2063, - Iir_Kind_Base_Attribute => 2065, - Iir_Kind_Subtype_Attribute => 2070, - Iir_Kind_Element_Attribute => 2075, - Iir_Kind_Across_Attribute => 2080, - Iir_Kind_Through_Attribute => 2085, - Iir_Kind_Nature_Reference_Attribute => 2089, - Iir_Kind_Left_Type_Attribute => 2094, - Iir_Kind_Right_Type_Attribute => 2099, - Iir_Kind_High_Type_Attribute => 2104, - Iir_Kind_Low_Type_Attribute => 2109, - Iir_Kind_Ascending_Type_Attribute => 2114, - Iir_Kind_Image_Attribute => 2120, - Iir_Kind_Value_Attribute => 2126, - Iir_Kind_Pos_Attribute => 2132, - Iir_Kind_Val_Attribute => 2138, - Iir_Kind_Succ_Attribute => 2144, - Iir_Kind_Pred_Attribute => 2150, - Iir_Kind_Leftof_Attribute => 2156, - Iir_Kind_Rightof_Attribute => 2162, - Iir_Kind_Signal_Slew_Attribute => 2170, - Iir_Kind_Quantity_Slew_Attribute => 2178, - Iir_Kind_Ramp_Attribute => 2186, - Iir_Kind_Zoh_Attribute => 2194, - Iir_Kind_Ltf_Attribute => 2202, - Iir_Kind_Ztf_Attribute => 2212, - Iir_Kind_Dot_Attribute => 2219, - Iir_Kind_Integ_Attribute => 2226, - Iir_Kind_Above_Attribute => 2234, - Iir_Kind_Quantity_Delayed_Attribute => 2242, - Iir_Kind_Delayed_Attribute => 2251, - Iir_Kind_Stable_Attribute => 2260, - Iir_Kind_Quiet_Attribute => 2269, - Iir_Kind_Transaction_Attribute => 2278, - Iir_Kind_Event_Attribute => 2282, - Iir_Kind_Active_Attribute => 2286, - Iir_Kind_Last_Event_Attribute => 2290, - Iir_Kind_Last_Active_Attribute => 2294, - Iir_Kind_Last_Value_Attribute => 2298, - Iir_Kind_Driving_Attribute => 2302, - Iir_Kind_Driving_Value_Attribute => 2306, - Iir_Kind_Behavior_Attribute => 2306, - Iir_Kind_Structure_Attribute => 2306, - Iir_Kind_Simple_Name_Attribute => 2313, - Iir_Kind_Instance_Name_Attribute => 2318, - Iir_Kind_Path_Name_Attribute => 2323, - Iir_Kind_Left_Array_Attribute => 2330, - Iir_Kind_Right_Array_Attribute => 2337, - Iir_Kind_High_Array_Attribute => 2344, - Iir_Kind_Low_Array_Attribute => 2351, - Iir_Kind_Length_Array_Attribute => 2358, - Iir_Kind_Ascending_Array_Attribute => 2365, - Iir_Kind_Range_Array_Attribute => 2372, - Iir_Kind_Reverse_Range_Array_Attribute => 2379, - Iir_Kind_Attribute_Name => 2388 + Iir_Kind_Suspend_State_Statement => 1983, + Iir_Kind_Character_Literal => 1990, + Iir_Kind_Simple_Name => 1997, + Iir_Kind_Selected_Name => 2005, + Iir_Kind_Operator_Symbol => 2010, + Iir_Kind_Reference_Name => 2015, + Iir_Kind_External_Constant_Name => 2024, + Iir_Kind_External_Signal_Name => 2033, + Iir_Kind_External_Variable_Name => 2043, + Iir_Kind_Selected_By_All_Name => 2049, + Iir_Kind_Parenthesis_Name => 2054, + Iir_Kind_Package_Pathname => 2058, + Iir_Kind_Absolute_Pathname => 2059, + Iir_Kind_Relative_Pathname => 2060, + Iir_Kind_Pathname_Element => 2065, + Iir_Kind_Base_Attribute => 2067, + Iir_Kind_Subtype_Attribute => 2072, + Iir_Kind_Element_Attribute => 2077, + Iir_Kind_Across_Attribute => 2082, + Iir_Kind_Through_Attribute => 2087, + Iir_Kind_Nature_Reference_Attribute => 2091, + Iir_Kind_Left_Type_Attribute => 2096, + Iir_Kind_Right_Type_Attribute => 2101, + Iir_Kind_High_Type_Attribute => 2106, + Iir_Kind_Low_Type_Attribute => 2111, + Iir_Kind_Ascending_Type_Attribute => 2116, + Iir_Kind_Image_Attribute => 2122, + Iir_Kind_Value_Attribute => 2128, + Iir_Kind_Pos_Attribute => 2134, + Iir_Kind_Val_Attribute => 2140, + Iir_Kind_Succ_Attribute => 2146, + Iir_Kind_Pred_Attribute => 2152, + Iir_Kind_Leftof_Attribute => 2158, + Iir_Kind_Rightof_Attribute => 2164, + Iir_Kind_Signal_Slew_Attribute => 2172, + Iir_Kind_Quantity_Slew_Attribute => 2180, + Iir_Kind_Ramp_Attribute => 2188, + Iir_Kind_Zoh_Attribute => 2196, + Iir_Kind_Ltf_Attribute => 2204, + Iir_Kind_Ztf_Attribute => 2214, + Iir_Kind_Dot_Attribute => 2221, + Iir_Kind_Integ_Attribute => 2228, + Iir_Kind_Above_Attribute => 2236, + Iir_Kind_Quantity_Delayed_Attribute => 2244, + Iir_Kind_Delayed_Attribute => 2253, + Iir_Kind_Stable_Attribute => 2262, + Iir_Kind_Quiet_Attribute => 2271, + Iir_Kind_Transaction_Attribute => 2280, + Iir_Kind_Event_Attribute => 2284, + Iir_Kind_Active_Attribute => 2288, + Iir_Kind_Last_Event_Attribute => 2292, + Iir_Kind_Last_Active_Attribute => 2296, + Iir_Kind_Last_Value_Attribute => 2300, + Iir_Kind_Driving_Attribute => 2304, + Iir_Kind_Driving_Value_Attribute => 2308, + Iir_Kind_Behavior_Attribute => 2308, + Iir_Kind_Structure_Attribute => 2308, + Iir_Kind_Simple_Name_Attribute => 2315, + Iir_Kind_Instance_Name_Attribute => 2320, + Iir_Kind_Path_Name_Attribute => 2325, + Iir_Kind_Left_Array_Attribute => 2332, + Iir_Kind_Right_Array_Attribute => 2339, + Iir_Kind_High_Array_Attribute => 2346, + Iir_Kind_Low_Array_Attribute => 2353, + Iir_Kind_Length_Array_Attribute => 2360, + Iir_Kind_Ascending_Array_Attribute => 2367, + Iir_Kind_Range_Array_Attribute => 2374, + Iir_Kind_Reverse_Range_Array_Attribute => 2381, + Iir_Kind_Attribute_Name => 2390 ); function Get_Fields_First (K : Iir_Kind) return Fields_Index is @@ -8570,6 +8580,7 @@ package body Vhdl.Nodes_Meta is | Iir_Kind_Interface_Function_Declaration | Iir_Kind_Interface_Procedure_Declaration | Iir_Kind_Signal_Attribute_Declaration + | Iir_Kind_Suspend_State_Declaration | Iir_Kind_Sensitized_Process_Statement | Iir_Kind_Process_Statement | Iir_Kind_Concurrent_Simple_Signal_Assignment @@ -8613,6 +8624,7 @@ package body Vhdl.Nodes_Meta is | Iir_Kind_Procedure_Call_Statement | Iir_Kind_Break_Statement | Iir_Kind_If_Statement + | Iir_Kind_Suspend_State_Statement | Iir_Kind_External_Constant_Name | Iir_Kind_External_Signal_Name | Iir_Kind_External_Variable_Name => @@ -9583,13 +9595,7 @@ package body Vhdl.Nodes_Meta is function Has_Return_Identifier (K : Iir_Kind) return Boolean is begin - case K is - when Iir_Kind_Function_Declaration - | Iir_Kind_Procedure_Declaration => - return True; - when others => - return False; - end case; + return K = Iir_Kind_Function_Declaration; end Has_Return_Identifier; function Has_Visible_Flag (K : Iir_Kind) return Boolean is @@ -10997,6 +11003,7 @@ package body Vhdl.Nodes_Meta is | Iir_Kind_Interface_Function_Declaration | Iir_Kind_Interface_Procedure_Declaration | Iir_Kind_Signal_Attribute_Declaration + | Iir_Kind_Suspend_State_Declaration | Iir_Kind_Sensitized_Process_Statement | Iir_Kind_Process_Statement | Iir_Kind_Concurrent_Simple_Signal_Assignment @@ -11044,6 +11051,7 @@ package body Vhdl.Nodes_Meta is | Iir_Kind_Break_Statement | Iir_Kind_If_Statement | Iir_Kind_Elsif + | Iir_Kind_Suspend_State_Statement | Iir_Kind_External_Constant_Name | Iir_Kind_External_Signal_Name | Iir_Kind_External_Variable_Name => @@ -12072,7 +12080,6 @@ package body Vhdl.Nodes_Meta is case K is when Iir_Kind_Signature | Iir_Kind_Function_Declaration - | Iir_Kind_Procedure_Declaration | Iir_Kind_Interface_Function_Declaration | Iir_Kind_Interface_Procedure_Declaration => return True; diff --git a/src/vhdl/vhdl-utils.adb b/src/vhdl/vhdl-utils.adb index 8e9d5af90..fecb0602c 100644 --- a/src/vhdl/vhdl-utils.adb +++ b/src/vhdl/vhdl-utils.adb @@ -240,17 +240,17 @@ package body Vhdl.Utils is loop case Get_Kind (Adecl) is when Iir_Kinds_Non_Alias_Object_Declaration - | Iir_Kinds_Quantity_Declaration - | Iir_Kind_Terminal_Declaration - | Iir_Kind_Interface_Quantity_Declaration - | Iir_Kind_Interface_Terminal_Declaration - | Iir_Kind_Interface_Type_Declaration - | Iir_Kind_Interface_Package_Declaration - | Iir_Kind_Interface_Function_Declaration - | Iir_Kind_Interface_Procedure_Declaration - | Iir_Kind_External_Signal_Name - | Iir_Kind_External_Constant_Name - | Iir_Kind_External_Variable_Name => + | Iir_Kinds_Quantity_Declaration + | Iir_Kind_Terminal_Declaration + | Iir_Kind_Interface_Quantity_Declaration + | Iir_Kind_Interface_Terminal_Declaration + | Iir_Kind_Interface_Type_Declaration + | Iir_Kind_Interface_Package_Declaration + | Iir_Kind_Interface_Function_Declaration + | Iir_Kind_Interface_Procedure_Declaration + | Iir_Kind_External_Signal_Name + | Iir_Kind_External_Constant_Name + | Iir_Kind_External_Variable_Name => return Adecl; when Iir_Kind_Object_Alias_Declaration => if With_Alias then @@ -259,35 +259,36 @@ package body Vhdl.Utils is return Adecl; end if; when Iir_Kind_Indexed_Name - | Iir_Kind_Slice_Name - | Iir_Kind_Selected_Element - | Iir_Kind_Selected_By_All_Name => + | Iir_Kind_Slice_Name + | Iir_Kind_Selected_Element + | Iir_Kind_Selected_By_All_Name => Adecl := Get_Base_Name (Adecl); when Iir_Kinds_Literal - | Iir_Kind_Overflow_Literal - | Iir_Kind_Enumeration_Literal - | Iir_Kinds_Monadic_Operator - | Iir_Kinds_Dyadic_Operator - | Iir_Kind_Function_Call - | Iir_Kind_Qualified_Expression - | Iir_Kind_Type_Conversion - | Iir_Kind_Allocator_By_Expression - | Iir_Kind_Allocator_By_Subtype - | Iir_Kind_Parenthesis_Expression - | Iir_Kinds_Attribute - | Iir_Kind_Attribute_Value - | Iir_Kind_Aggregate - | Iir_Kind_Simple_Aggregate - | Iir_Kind_Dereference - | Iir_Kind_Implicit_Dereference - | Iir_Kind_Unit_Declaration - | Iir_Kind_Psl_Expression - | Iir_Kinds_Concurrent_Statement - | Iir_Kinds_Sequential_Statement - | Iir_Kinds_Simultaneous_Statement => + | Iir_Kind_Overflow_Literal + | Iir_Kind_Enumeration_Literal + | Iir_Kinds_Monadic_Operator + | Iir_Kinds_Dyadic_Operator + | Iir_Kind_Function_Call + | Iir_Kind_Qualified_Expression + | Iir_Kind_Type_Conversion + | Iir_Kind_Allocator_By_Expression + | Iir_Kind_Allocator_By_Subtype + | Iir_Kind_Parenthesis_Expression + | Iir_Kinds_Attribute + | Iir_Kind_Attribute_Value + | Iir_Kind_Aggregate + | Iir_Kind_Simple_Aggregate + | Iir_Kind_Dereference + | Iir_Kind_Implicit_Dereference + | Iir_Kind_Unit_Declaration + | Iir_Kind_Psl_Expression + | Iir_Kinds_Concurrent_Statement + | Iir_Kinds_Sequential_Statement + | Iir_Kinds_Simultaneous_Statement + | Iir_Kind_Suspend_State_Statement => return Adecl; when Iir_Kind_Simple_Name - | Iir_Kind_Selected_Name => + | Iir_Kind_Selected_Name => Adecl := Get_Named_Entity (Adecl); when Iir_Kind_Attribute_Name => return Get_Named_Entity (Adecl); @@ -323,6 +324,7 @@ package body Vhdl.Utils is | Iir_Kind_Group_Template_Declaration | Iir_Kind_Group_Declaration | Iir_Kind_Signal_Attribute_Declaration + | Iir_Kind_Suspend_State_Declaration | Iir_Kind_Unaffected_Waveform | Iir_Kind_Waveform_Element | Iir_Kind_Conditional_Waveform diff --git a/testsuite/synth/issue2062/fxt.vhdl b/testsuite/synth/issue2062/fxt.vhdl new file mode 100644 index 000000000..8ee26e5a2 --- /dev/null +++ b/testsuite/synth/issue2062/fxt.vhdl @@ -0,0 +1,15 @@ +library ieee; +use ieee.std_logic_1164.all; +use ieee.numeric_std.all; + +use work.fixed_pkg.all; + +entity fxt is port ( + a : in std_logic_vector(6 downto 0); + y : out ufixed(3 downto -2)); +end entity; + +architecture beh of fxt is +begin + y <= to_ufixed(a, 5, 1); +end beh; diff --git a/testsuite/synth/issue2062/fxt2.vhdl b/testsuite/synth/issue2062/fxt2.vhdl new file mode 100644 index 000000000..a63ff4d7e --- /dev/null +++ b/testsuite/synth/issue2062/fxt2.vhdl @@ -0,0 +1,14 @@ +library ieee; +use ieee.std_logic_1164.all; +use ieee.numeric_std.all; +use ieee.fixed_pkg.all; + +entity fxt2 is port ( + a : in std_logic_vector(5 downto 0); + y : out ufixed(3 downto -2)); +end entity; + +architecture beh of fxt2 is +begin + y <= to_ufixed(a, 6, 1); +end beh; diff --git a/testsuite/synth/issue2062/repro.vhdl b/testsuite/synth/issue2062/repro.vhdl new file mode 100644 index 000000000..2b676415c --- /dev/null +++ b/testsuite/synth/issue2062/repro.vhdl @@ -0,0 +1,12 @@ +library ieee; +use ieee.std_logic_1164.all; + +entity repro is port ( + a : in std_logic_vector(5 downto 0); + y : out std_ulogic_vector(3 downto -2)); +end entity; + +architecture beh of repro is +begin + y <= to_stdulogicvector(a); +end beh; diff --git a/testsuite/synth/issue2062/testsuite.sh b/testsuite/synth/issue2062/testsuite.sh new file mode 100755 index 000000000..7ca626bd5 --- /dev/null +++ b/testsuite/synth/issue2062/testsuite.sh @@ -0,0 +1,10 @@ +#! /bin/sh + +. ../../testenv.sh + +synth_only repro + +GHDL_STD_FLAGS=--std=08 +synth_only fxt2 + +echo "Test successful" |