diff options
| -rwxr-xr-x | testsuite/synth/psl02/testsuite.sh | 7 | ||||
| -rw-r--r-- | testsuite/synth/psl02/verif2.vhdl | 6 |
2 files changed, 11 insertions, 2 deletions
diff --git a/testsuite/synth/psl02/testsuite.sh b/testsuite/synth/psl02/testsuite.sh index 0e5929ed9..53a6de2d8 100755 --- a/testsuite/synth/psl02/testsuite.sh +++ b/testsuite/synth/psl02/testsuite.sh @@ -7,8 +7,11 @@ GHDL_STD_FLAGS=--std=08 synth assert1.vhdl -e assert1 > syn_assert1.vhdl analyze syn_assert1.vhdl -synth assert2.vhdl verif1.vhdl -e assert2 > syn_assert2.vhdl -analyze syn_assert2.vhdl +synth assert2.vhdl verif1.vhdl -e assert2 > syn_assert21.vhdl +analyze syn_assert21.vhdl + +synth assert2.vhdl verif2.vhdl -e assert2 > syn_assert22.vhdl +analyze syn_assert22.vhdl clean diff --git a/testsuite/synth/psl02/verif2.vhdl b/testsuite/synth/psl02/verif2.vhdl new file mode 100644 index 000000000..d9b68e28c --- /dev/null +++ b/testsuite/synth/psl02/verif2.vhdl @@ -0,0 +1,6 @@ +vunit verif2 (assert2) +{ + default clock is rising_edge(clk); + assume always cnt < 10; + assert always cnt /= 5 abort rst; +} |