aboutsummaryrefslogtreecommitdiffstats
path: root/doc/intro/WhatIsVHDL.rst
diff options
context:
space:
mode:
Diffstat (limited to 'doc/intro/WhatIsVHDL.rst')
-rw-r--r--doc/intro/WhatIsVHDL.rst4
1 files changed, 1 insertions, 3 deletions
diff --git a/doc/intro/WhatIsVHDL.rst b/doc/intro/WhatIsVHDL.rst
index b70b3a723..852168f78 100644
--- a/doc/intro/WhatIsVHDL.rst
+++ b/doc/intro/WhatIsVHDL.rst
@@ -28,8 +28,6 @@ Like a program written in another hardware description language, a `VHDL`
program can be transformed with a :dfn:`synthesis tool` into a netlist, that is,
a detailed gate-level implementation.
-----------------
-
-.. TODO: topic
+.. TODO:: topic
@1138 very very briefly explain that there are four major verions: 87, 93, 02 and 08 \ No newline at end of file