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-rw-r--r--pyGHDL/dom/Concurrent.py2
1 files changed, 1 insertions, 1 deletions
diff --git a/pyGHDL/dom/Concurrent.py b/pyGHDL/dom/Concurrent.py
index f57f4fa49..ab30f9176 100644
--- a/pyGHDL/dom/Concurrent.py
+++ b/pyGHDL/dom/Concurrent.py
@@ -44,7 +44,7 @@ from pyVHDLModel.SyntaxModel import (
IfGenerateStatement as VHDLModel_IfGenerateStatement,
CaseGenerateStatement as VHDLModel_CaseGenerateStatement,
ForGenerateStatement as VHDLModel_ForGenerateStatement,
- ConcurrentSignalAssignment as VHDLModel_ConcurrentSignalAssignment,
+ ConcurrentSimpleSignalAssignment as VHDLModel_ConcurrentSimpleSignalAssignment,
Name,
ConcurrentStatement,
SequentialStatement,