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-rw-r--r--src/simul/simul-vhdl_simul.adb6
1 files changed, 3 insertions, 3 deletions
diff --git a/src/simul/simul-vhdl_simul.adb b/src/simul/simul-vhdl_simul.adb
index b44028c57..5d691e807 100644
--- a/src/simul/simul-vhdl_simul.adb
+++ b/src/simul/simul-vhdl_simul.adb
@@ -2075,9 +2075,9 @@ package body Simul.Vhdl_Simul is
-- Grt.Errors.Error_Hook := Debug_Error'Access;
--- if Flag_Interractive then
--- Debug (Reason_Start);
--- end if;
+ if Flag_Debug_Elab then
+ Elab.Debugger.Debug_Elab (Vhdl_Elab.Top_Instance);
+ end if;
Ok := Grt.Main.Run_Elab;
if not Ok then