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-rw-r--r--src/simul/simul-vhdl_simul.ads1
1 files changed, 1 insertions, 0 deletions
diff --git a/src/simul/simul-vhdl_simul.ads b/src/simul/simul-vhdl_simul.ads
index 66a032f22..47c1273be 100644
--- a/src/simul/simul-vhdl_simul.ads
+++ b/src/simul/simul-vhdl_simul.ads
@@ -33,6 +33,7 @@ with Grt.Signals;
package Simul.Vhdl_Simul is
Break_Time : Std_Time;
+ Break_Step : Boolean;
Trace_Simulation : Boolean := False;