diff options
Diffstat (limited to 'src/synth/elab-vhdl_values-debug.adb')
| -rw-r--r-- | src/synth/elab-vhdl_values-debug.adb | 165 |
1 files changed, 114 insertions, 51 deletions
diff --git a/src/synth/elab-vhdl_values-debug.adb b/src/synth/elab-vhdl_values-debug.adb index 193515e27..a7cf2f9a3 100644 --- a/src/synth/elab-vhdl_values-debug.adb +++ b/src/synth/elab-vhdl_values-debug.adb @@ -46,35 +46,72 @@ package body Elab.Vhdl_Values.Debug is end if; end Debug_Bound; + procedure Debug_Typ_Phys (T : Type_Acc) is + begin + Put ("[al="); + Put_Int32 (Int32 (T.Al)); + Put (" sz="); + Put_Uns32 (Uns32 (T.Sz)); + Put (" w="); + Put_Uns32 (T.W); + Put (']'); + end Debug_Typ_Phys; + procedure Debug_Typ1 (T : Type_Acc) is begin case T.Kind is - when Type_Bit - | Type_Logic => + when Type_Bit => + Put ("bit"); + Debug_Typ_Phys (T); + when Type_Logic => Put ("bit/logic"); + Debug_Typ_Phys (T); when Type_Vector => - Put ("vector ("); - Debug_Bound (T.Vbound, True); - Put (") of ["); - Debug_Typ1 (T.Vec_El); - Put ("]"); + Put ("vector "); + Debug_Typ_Phys (T); + Put (" ("); + Debug_Bound (T.Abound, True); + Put (") of "); + Debug_Typ1 (T.Arr_El); when Type_Array => - Put ("arr ("); - for I in 1 .. T.Abounds.Ndim loop - if I > 1 then + Put ("arr "); + Debug_Typ_Phys (T); + Put (" ("); + declare + It : Type_Acc; + begin + It := T; + loop + Debug_Bound (It.Abound, True); + exit when It.Alast; + Put (", "); + It := It.Arr_El; + end loop; + Put (") of "); + Debug_Typ1 (It.Arr_El); + end; + when Type_Record => + Put ("rec "); + Debug_Typ_Phys (T); + Put (" ("); + for I in T.Rec.E'Range loop + if I /= 1 then Put (", "); end if; - Debug_Bound (T.Abounds.D (I), True); + Put ("[noff="); + Put_Uns32 (T.Rec.E (I).Offs.Net_Off); + Put (", moff="); + Put_Uns32 (Uns32 (T.Rec.E (I).Offs.Mem_Off)); + Put ("] "); + Debug_Typ1 (T.Rec.E (I).Typ); end loop; - Put (") of "); - Debug_Typ1 (T.Arr_El); - when Type_Record => - Put ("rec: ("); Put (")"); when Type_Unbounded_Record => Put ("unbounded record"); when Type_Discrete => - Put ("discrete: "); + Put ("discrete "); + Debug_Typ_Phys (T); + Put (": "); Put_Int64 (T.Drange.Left); Put (' '); Put_Dir (T.Drange.Dir); @@ -96,17 +133,23 @@ package body Elab.Vhdl_Values.Debug is when Type_Unbounded_Vector => Put ("unbounded vector"); when Type_Unbounded_Array => - Put ("unbounded array"); + Put ("unbounded arr ("); + declare + It : Type_Acc; + begin + It := T; + loop + Put ("<>"); + exit when It.Ulast; + Put (", "); + It := It.Uarr_El; + end loop; + Put (") of "); + Debug_Typ1 (It.Uarr_El); + end; when Type_Protected => Put ("protected"); end case; - Put (' '); - Put (" al="); - Put_Int32 (Int32 (T.Al)); - Put (" sz="); - Put_Uns32 (Uns32 (T.Sz)); - Put (" w="); - Put_Uns32 (T.W); end Debug_Typ1; procedure Debug_Typ (T : Type_Acc) is @@ -123,19 +166,24 @@ package body Elab.Vhdl_Values.Debug is when Type_Logic => Put ("logic"); when Type_Vector => - Debug_Type_Short (T.Vec_El); + Debug_Type_Short (T.Arr_El); Put ("_vec("); - Debug_Bound (T.Vbound, False); + Debug_Bound (T.Abound, False); Put (")"); when Type_Array => - Put ("arr ("); - for I in 1 .. T.Abounds.Ndim loop - if I > 1 then + declare + It : Type_Acc; + begin + Put ("arr ("); + It := T; + loop + Debug_Bound (It.Abound, False); + exit when It.Alast; + It := It.Arr_El; Put (", "); - end if; - Debug_Bound (T.Abounds.D (I), False); - end loop; - Put (")"); + end loop; + Put (")"); + end; when Type_Record => Put ("rec: ("); Put (")"); @@ -165,30 +213,40 @@ package body Elab.Vhdl_Values.Debug is case M.Typ.Kind is when Type_Bit | Type_Logic => - Put ("bit/logic"); + Put ("bit/logic: "); + Put_Uns32 (Uns32 (Read_U8 (M.Mem))); when Type_Vector => Put ("vector ("); - Debug_Bound (M.Typ.Vbound, True); + Debug_Bound (M.Typ.Abound, True); Put ("): "); - for I in 1 .. M.Typ.Vbound.Len loop + for I in 1 .. M.Typ.Abound.Len loop Put_Uns32 (Uns32 (Read_U8 (M.Mem + Size_Type (I - 1)))); end loop; when Type_Array => - Put ("arr ("); - for I in 1 .. M.Typ.Abounds.Ndim loop - if I > 1 then + declare + T : Type_Acc; + El : Type_Acc; + Len : Uns32; + begin + Put ("arr ("); + T := M.Typ; + Len := 1; + loop + Debug_Bound (T.Abound, True); + Len := Len * T.Abound.Len; + El := T.Arr_El; + exit when T.Alast; + T := El; Put (", "); - end if; - Debug_Bound (M.Typ.Abounds.D (I), True); - end loop; - Put ("): "); - for I in 1 .. Get_Array_Flat_Length (M.Typ) loop - if I > 1 then - Put (", "); - end if; - Debug_Memtyp - ((M.Typ.Arr_El, M.Mem + Size_Type (I - 1) * M.Typ.Arr_El.Sz)); - end loop; + end loop; + Put ("): "); + for I in 1 .. Len loop + if I > 1 then + Put (", "); + end if; + Debug_Memtyp ((El, M.Mem + Size_Type (I - 1) * El.Sz)); + end loop; + end; when Type_Record => Put ("rec: ("); for I in M.Typ.Rec.E'Range loop @@ -196,7 +254,7 @@ package body Elab.Vhdl_Values.Debug is Put (", "); end if; Debug_Memtyp - ((M.Typ.Rec.E (I).Typ, M.Mem + M.Typ.Rec.E (I).Moff)); + ((M.Typ.Rec.E (I).Typ, M.Mem + M.Typ.Rec.E (I).Offs.Mem_Off)); end loop; Put (")"); when Type_Discrete => @@ -236,6 +294,8 @@ package body Elab.Vhdl_Values.Debug is New_Line; when Value_Signal => Put ("signal "); + Put_Uns32 (Uns32 (V.Val.S)); + Put (": "); Debug_Typ1 (V.Typ); New_Line; when Value_Wire => @@ -249,6 +309,9 @@ package body Elab.Vhdl_Values.Debug is Debug_Typ1 (V.Typ); Put (" of "); Debug_Valtyp ((V.Typ, V.Val.A_Obj)); + when Value_Dyn_Alias => + Put ("dyn alias: "); + Debug_Typ1 (V.Typ); end case; end Debug_Valtyp; |