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-rw-r--r--src/vhdl/simulate/simul-annotations.adb3
1 files changed, 2 insertions, 1 deletions
diff --git a/src/vhdl/simulate/simul-annotations.adb b/src/vhdl/simulate/simul-annotations.adb
index 8fb4c4fdc..f807f12b7 100644
--- a/src/vhdl/simulate/simul-annotations.adb
+++ b/src/vhdl/simulate/simul-annotations.adb
@@ -1021,7 +1021,8 @@ package body Simul.Annotations is
null;
when Iir_Kind_Concurrent_Simple_Signal_Assignment
- | Iir_Kind_Concurrent_Selected_Signal_Assignment =>
+ | Iir_Kind_Concurrent_Selected_Signal_Assignment
+ | Iir_Kind_Concurrent_Conditional_Signal_Assignment =>
-- In case concurrent signal assignemnts were not
-- canonicalized (for synthesis).
null;