diff options
Diffstat (limited to 'src/vhdl/simulate')
-rw-r--r-- | src/vhdl/simulate/simul-annotations.adb | 8 | ||||
-rw-r--r-- | src/vhdl/simulate/simul-debugger.adb | 4 | ||||
-rw-r--r-- | src/vhdl/simulate/simul-execution.adb | 6 | ||||
-rw-r--r-- | src/vhdl/simulate/simul-simulation-main.adb | 4 |
4 files changed, 11 insertions, 11 deletions
diff --git a/src/vhdl/simulate/simul-annotations.adb b/src/vhdl/simulate/simul-annotations.adb index f02f642b1..22ca12a07 100644 --- a/src/vhdl/simulate/simul-annotations.adb +++ b/src/vhdl/simulate/simul-annotations.adb @@ -18,7 +18,7 @@ with Tables; with Ada.Text_IO; -with Std_Package; +with Vhdl.Std_Package; with Errorout; use Errorout; with Iirs_Utils; use Iirs_Utils; with Types; use Types; @@ -279,8 +279,8 @@ package body Simul.Annotations is declare Mode : Iir_Value_Kind; begin - if Def = Std_Package.Boolean_Type_Definition - or else Def = Std_Package.Bit_Type_Definition + if Def = Vhdl.Std_Package.Boolean_Type_Definition + or else Def = Vhdl.Std_Package.Bit_Type_Definition then Mode := Iir_Value_B1; elsif (Get_Nbr_Elements (Get_Enumeration_Literal_List (Def)) @@ -1161,7 +1161,7 @@ package body Simul.Annotations is Annotate_Architecture (El); when Iir_Kind_Package_Declaration => declare - use Std_Package; + use Vhdl.Std_Package; begin if El = Standard_Package then pragma Assert (Global_Info = null); diff --git a/src/vhdl/simulate/simul-debugger.adb b/src/vhdl/simulate/simul-debugger.adb index 8c911a706..e96a8100e 100644 --- a/src/vhdl/simulate/simul-debugger.adb +++ b/src/vhdl/simulate/simul-debugger.adb @@ -31,7 +31,7 @@ with Vhdl.Sem_Scopes; with Vhdl.Canon; with Std_Names; with Libraries; -with Std_Package; +with Vhdl.Std_Package; with Simul.Annotations; use Simul.Annotations; with Simul.Elaboration; use Simul.Elaboration; with Simul.Execution; use Simul.Execution; @@ -1826,7 +1826,7 @@ package body Simul.Debugger is -- Add STD Add_Name (Libraries.Std_Library, Std_Names.Name_Std, False); - Use_All_Names (Std_Package.Standard_Package); + Use_All_Names (Vhdl.Std_Package.Standard_Package); Foreach_Scopes (Node, Add_Decls_For'Access); end Enter_Scope; diff --git a/src/vhdl/simulate/simul-execution.adb b/src/vhdl/simulate/simul-execution.adb index 3a1c11028..59d91c8ef 100644 --- a/src/vhdl/simulate/simul-execution.adb +++ b/src/vhdl/simulate/simul-execution.adb @@ -22,7 +22,7 @@ with System; with Grt.Types; use Grt.Types; with Flags; use Flags; with Errorout; use Errorout; -with Std_Package; +with Vhdl.Std_Package; with Evaluation; with Iirs_Utils; use Iirs_Utils; with Simul.Annotations; use Simul.Annotations; @@ -1321,7 +1321,7 @@ package body Simul.Execution is Pos : constant Natural := Get_Enum_Pos (Left); Id : Name_Id; begin - if Base_Type = Std_Package.Character_Type_Definition then + if Base_Type = Vhdl.Std_Package.Character_Type_Definition then Result := String_To_Iir_Value ((1 => Character'Val (Pos))); else Id := Get_Identifier (Get_Nth_Element (Lits, Pos)); @@ -1418,7 +1418,7 @@ package body Simul.Execution is First : Natural; Unit : Iir; begin - Unit := Get_Unit_Chain (Std_Package.Time_Type_Definition); + Unit := Get_Unit_Chain (Vhdl.Std_Package.Time_Type_Definition); while Unit /= Null_Iir loop exit when Evaluation.Get_Physical_Value (Unit) = Iir_Int64 (Right.I64); diff --git a/src/vhdl/simulate/simul-simulation-main.adb b/src/vhdl/simulate/simul-simulation-main.adb index 7d6f0e7c7..2d0558308 100644 --- a/src/vhdl/simulate/simul-simulation-main.adb +++ b/src/vhdl/simulate/simul-simulation-main.adb @@ -24,7 +24,7 @@ with Errorout; use Errorout; with PSL.Nodes; with PSL.NFAs; with PSL.NFAs.Utils; -with Std_Package; +with Vhdl.Std_Package; with Trans_Analyzes; with Simul.Elaboration; use Simul.Elaboration; with Simul.Execution; use Simul.Execution; @@ -379,7 +379,7 @@ package body Simul.Simulation.Main is Res : Iir_Value_Literal_Acc; begin Res := Execute_Expression (Instance, E); - if Rtype = Std_Package.Boolean_Type_Definition then + if Rtype = Vhdl.Std_Package.Boolean_Type_Definition then return Res.B1 = True; elsif Rtype = Ieee.Std_Logic_1164.Std_Ulogic_Type then return Res.E8 = 3 or Res.E8 = 7; -- 1 or H |