3 files changed, 10 insertions, 10 deletions
diff --git a/src/vhdl/translate/ortho_front.adb b/src/vhdl/translate/ortho_front.adb
index 3fc6f4e81..6db015494 100644
--- a/src/vhdl/translate/ortho_front.adb
+++ b/src/vhdl/translate/ortho_front.adb
@@ -27,7 +27,7 @@ with Libraries;
 with Iirs_Utils; use Iirs_Utils;
 with Std_Package;
 with Flags;
-with Configuration;
+with Vhdl.Configuration;
 with Translation;
 with Vhdl.Sem;
 with Vhdl.Sem_Lib; use Vhdl.Sem_Lib;
@@ -324,7 +324,7 @@ package body Ortho_Front is
 
       --  Gather dependencies
       pragma Assert (Flags.Flag_Elaborate = False);
-      Configuration.Flag_Load_All_Design_Units := False;
+      Vhdl.Configuration.Flag_Load_All_Design_Units := False;
 
       --  Exclude std.standard
       Set_Configuration_Mark_Flag (Std_Package.Std_Standard_Unit, True);
@@ -450,7 +450,7 @@ package body Ortho_Front is
    is
       use Interfaces.C_Streams;
       use System;
-      use Configuration;
+      use Vhdl.Configuration;
       use Name_Table;
 
       Nul : constant Character := Character'Val (0);
@@ -550,7 +550,7 @@ package body Ortho_Front is
             Trans_Be.Sem_Foreign_Hook := Sem_Foreign_Hook'Access;
             Shlib_Interning.Init;
 
-            Config := Configuration.Configure
+            Config := Vhdl.Configuration.Configure
               (Elab_Entity.all, Elab_Architecture.all);
             if Errorout.Nbr_Errors > 0 then
                --  This may happen (bad entity for example).
@@ -604,7 +604,7 @@ package body Ortho_Front is
 
             Flags.Flag_Elaborate := True;
             Flags.Flag_Only_Elab_Warnings := False;
-            Config := Configuration.Configure
+            Config := Vhdl.Configuration.Configure
               (Elab_Entity.all, Elab_Architecture.all);
             Translation.Elaborate (Config, True);
 
diff --git a/src/vhdl/translate/trans-chap12.adb b/src/vhdl/translate/trans-chap12.adb
index 1659d54fb..00e071010 100644
--- a/src/vhdl/translate/trans-chap12.adb
+++ b/src/vhdl/translate/trans-chap12.adb
@@ -16,7 +16,7 @@
 --  Software Foundation, 59 Temple Place - Suite 330, Boston, MA
 --  02111-1307, USA.
 
-with Configuration;
+with Vhdl.Configuration;
 with Errorout; use Errorout;
 with Std_Package; use Std_Package;
 with Iirs_Utils; use Iirs_Utils;
@@ -419,7 +419,7 @@ package body Trans.Chap12 is
    --  Write to file FILELIST all the files that are needed to link the design.
    procedure Gen_Stubs
    is
-      use Configuration;
+      use Vhdl.Configuration;
 
       --  Add all dependences of UNIT.
       --  UNIT is not used, but added during link.
@@ -527,7 +527,7 @@ package body Trans.Chap12 is
 
    procedure Elaborate (Config : Iir_Design_Unit; Whole : Boolean)
    is
-      use Configuration;
+      use Vhdl.Configuration;
 
       Unit : Iir_Design_Unit;
       Lib_Unit : Iir;
diff --git a/src/vhdl/translate/trans-rtis.adb b/src/vhdl/translate/trans-rtis.adb
index 7a1baf407..b0997006d 100644
--- a/src/vhdl/translate/trans-rtis.adb
+++ b/src/vhdl/translate/trans-rtis.adb
@@ -20,7 +20,7 @@ with Name_Table;
 with Files_Map;
 with Errorout; use Errorout;
 with Iirs_Utils; use Iirs_Utils;
-with Configuration;
+with Vhdl.Configuration;
 with Libraries;
 with Trans.Chap7;
 with Trans; use Trans.Helpers;
@@ -2926,7 +2926,7 @@ package body Trans.Rtis is
 
    procedure Generate_Top (Nbr_Pkgs : out Natural)
    is
-      use Configuration;
+      use Vhdl.Configuration;
 
       Unit : Iir_Design_Unit;
       Lib  : Iir_Library_Declaration;