diff options
Diffstat (limited to 'src/vhdl/vhdl-annotations.adb')
| -rw-r--r-- | src/vhdl/vhdl-annotations.adb | 78 |
1 files changed, 61 insertions, 17 deletions
diff --git a/src/vhdl/vhdl-annotations.adb b/src/vhdl/vhdl-annotations.adb index e4f27f32c..8429d2dab 100644 --- a/src/vhdl/vhdl-annotations.adb +++ b/src/vhdl/vhdl-annotations.adb @@ -328,8 +328,13 @@ package body Vhdl.Annotations is -- Create an annotation for the element type, as it can be -- referenced by the implicit concat function definition for -- concatenation with element. - El := Get_Element_Subtype (Def); - Annotate_Anonymous_Type_Definition (Block_Info, El); + El := Get_Element_Subtype_Indication (Def); + if Get_Kind (El) in Iir_Kinds_Subtype_Definition then + -- But only if it is a proper new subtype definition + -- (ie not a denoting name, or attributes like 'subtype). + El := Get_Element_Subtype (Def); + Annotate_Anonymous_Type_Definition (Block_Info, El); + end if; -- Then for the array. Create_Object_Info (Block_Info, Def, Kind_Type); @@ -779,7 +784,7 @@ package body Vhdl.Annotations is when Iir_Kind_Function_Declaration | Iir_Kind_Procedure_Declaration => if (Get_Implicit_Definition (Decl) - not in Iir_Predefined_Pure_Functions) + not in Iir_Predefined_Operators) and then not Is_Second_Subprogram_Specification (Decl) then Annotate_Subprogram_Interfaces_Type (Block_Info, Decl); @@ -846,6 +851,9 @@ package body Vhdl.Annotations is when Iir_Kind_Psl_Default_Clock => null; + when Iir_Kind_Suspend_State_Declaration => + Create_Object_Info (Block_Info, Decl); + when others => Error_Kind ("annotate_declaration", Decl); end case; @@ -863,10 +871,32 @@ package body Vhdl.Annotations is end loop; end Annotate_Declaration_List; + procedure Annotate_Procedure_Call_Statement + (Block_Info : Sim_Info_Acc; Stmt : Iir) + is + Call : constant Iir := Get_Procedure_Call (Stmt); + Imp : constant Iir := Get_Implementation (Call); + Assoc_Chain : constant Iir := Get_Parameter_Association_Chain (Call); + Inter_Chain : constant Iir := Get_Interface_Declaration_Chain (Imp); + Assoc : Iir; + Assoc_Inter : Iir; + Inter : Iir; + begin + Assoc := Assoc_Chain; + Assoc_Inter := Inter_Chain; + while Assoc /= Null_Iir loop + Inter := Get_Association_Interface (Assoc, Assoc_Inter); + if Is_Copyback_Parameter (Inter) then + Create_Object_Info (Block_Info, Assoc, Kind_Object); + end if; + Next_Association_Interface (Assoc, Assoc_Inter); + end loop; + end Annotate_Procedure_Call_Statement; + procedure Annotate_Sequential_Statement_Chain (Block_Info: Sim_Info_Acc; Stmt_Chain: Iir) is - El: Iir; + Stmt : Iir; Max_Nbr_Objects : Object_Slot_Type; Current_Nbr_Objects : Object_Slot_Type; @@ -884,9 +914,9 @@ package body Vhdl.Annotations is Current_Nbr_Objects := Block_Info.Nbr_Objects; Max_Nbr_Objects := Current_Nbr_Objects; - El := Stmt_Chain; - while El /= Null_Iir loop - case Get_Kind (El) is + Stmt := Stmt_Chain; + while Stmt /= Null_Iir loop + case Get_Kind (Stmt) is when Iir_Kind_Null_Statement => null; when Iir_Kind_Assertion_Statement @@ -901,7 +931,8 @@ package body Vhdl.Annotations is | Iir_Kind_Conditional_Variable_Assignment_Statement => null; when Iir_Kind_Procedure_Call_Statement => - null; + Annotate_Procedure_Call_Statement (Block_Info, Stmt); + Save_Nbr_Objects; when Iir_Kind_Exit_Statement | Iir_Kind_Next_Statement => null; @@ -910,7 +941,7 @@ package body Vhdl.Annotations is when Iir_Kind_If_Statement => declare - Clause: Iir := El; + Clause: Iir := Stmt; begin loop Annotate_Sequential_Statement_Chain @@ -925,7 +956,7 @@ package body Vhdl.Annotations is declare Assoc: Iir; begin - Assoc := Get_Case_Statement_Alternative_Chain (El); + Assoc := Get_Case_Statement_Alternative_Chain (Stmt); loop Annotate_Sequential_Statement_Chain (Block_Info, Get_Associated_Chain (Assoc)); @@ -937,21 +968,24 @@ package body Vhdl.Annotations is when Iir_Kind_For_Loop_Statement => Annotate_Declaration - (Block_Info, Get_Parameter_Specification (El)); + (Block_Info, Get_Parameter_Specification (Stmt)); Annotate_Sequential_Statement_Chain - (Block_Info, Get_Sequential_Statement_Chain (El)); + (Block_Info, Get_Sequential_Statement_Chain (Stmt)); when Iir_Kind_While_Loop_Statement => Annotate_Sequential_Statement_Chain - (Block_Info, Get_Sequential_Statement_Chain (El)); + (Block_Info, Get_Sequential_Statement_Chain (Stmt)); + + when Iir_Kind_Suspend_State_Statement => + null; when others => - Error_Kind ("annotate_sequential_statement_chain", El); + Error_Kind ("annotate_sequential_statement_chain", Stmt); end case; Save_Nbr_Objects; - El := Get_Chain (El); + Stmt := Get_Chain (Stmt); end loop; Block_Info.Nbr_Objects := Max_Nbr_Objects; end Annotate_Sequential_Statement_Chain; @@ -1114,12 +1148,22 @@ package body Vhdl.Annotations is when Iir_Kind_Concurrent_Simple_Signal_Assignment | Iir_Kind_Concurrent_Selected_Signal_Assignment | Iir_Kind_Concurrent_Conditional_Signal_Assignment - | Iir_Kind_Concurrent_Assertion_Statement - | Iir_Kind_Concurrent_Procedure_Call_Statement => + | Iir_Kind_Concurrent_Assertion_Statement => -- In case concurrent signal assignemnts were not -- canonicalized (for synthesis). null; + when Iir_Kind_Concurrent_Procedure_Call_Statement => + declare + Info : Sim_Info_Acc; + begin + Info := new Sim_Info_Type'(Kind => Kind_Process, + Ref => Stmt, + Nbr_Objects => 0); + Set_Info (Stmt, Info); + Annotate_Procedure_Call_Statement (Info, Stmt); + end; + when others => Error_Kind ("annotate_concurrent_statement", Stmt); end case; |