diff options
Diffstat (limited to 'src/vhdl/vhdl-nodes.ads')
| -rw-r--r-- | src/vhdl/vhdl-nodes.ads | 277 |
1 files changed, 238 insertions, 39 deletions
diff --git a/src/vhdl/vhdl-nodes.ads b/src/vhdl/vhdl-nodes.ads index 1e97286d0..4a9fc797f 100644 --- a/src/vhdl/vhdl-nodes.ads +++ b/src/vhdl/vhdl-nodes.ads @@ -485,6 +485,10 @@ package Vhdl.Nodes is -- -- Get/Set_In_Formal_Flag (Flag4) -- + -- Only for Iir_Kind_Association_Element_By_Expression: + -- True for inertial associations (even without the inertial word). + -- Get/Set_Inertial_Flag (Flag5) + -- -- Only for Iir_Kind_Association_Element_By_Individual: -- Must be Locally unless there is an error on one choice. -- Get/Set_Choice_Staticness (State1) @@ -901,6 +905,10 @@ package Vhdl.Nodes is -- Get/Set_Type_Marks_List (Field2) -- -- Get/Set_Return_Type_Mark (Field8) + -- + -- Get/Set_Named_Entity (Field4) + -- + -- Get/Set_Is_Forward_Ref (Flag1) -- Iir_Kind_Overload_List (Short) -- @@ -1602,12 +1610,14 @@ package Vhdl.Nodes is -- -- Get/Set_Implicit_Definition (Field7) -- + -- Only for Iir_Kind_Function_Declaration: -- Get/Set_Return_Type_Mark (Field8) -- -- Get/Set_Subprogram_Body (Field9) -- -- Get/Set_Subprogram_Depth (Field10) -- + -- Only for Iir_Kind_Function_Declaration: -- Get/Set_Return_Identifier (Field11) -- -- Get/Set_Overload_Number (Field12) @@ -1872,6 +1882,17 @@ package Vhdl.Nodes is -- Chain of signals -- Get/Set_Signal_Attribute_Chain (Field3) + -- Iir_Kind_Suspend_State_Declaration (Short) + -- + -- Implicit state variable to handle suspension. Added after semantic + -- analysis. + -- + -- Get/Set_Parent (Field0) + -- + -- Get/Set_Chain (Field2) + -- + -- Get/Set_Suspend_State_Chain (Field4) + -- Iir_Kind_Constant_Declaration (Medium) -- Iir_Kind_Iterator_Declaration (Short) -- @@ -2692,6 +2713,9 @@ package Vhdl.Nodes is -- Get/Set_Has_Signal_Flag (Flag3) -- Iir_Kind_Protected_Type_Declaration (Short) + -- The parent of a protected type declarationi s the same parent as the + -- type declaration. + -- Get/Set_Parent (Field0) -- -- Get/Set_Declaration_Chain (Field1) -- @@ -4122,6 +4146,19 @@ package Vhdl.Nodes is -- -- Get/Set_Expression (Field5) + -- Iir_Kind_Suspend_State_Statement (Short) + -- + -- Implicit statement added to mark a suspend point. + -- + -- Get/Set_Parent (Field0) + -- + -- Next statement + -- Get/Set_Chain (Field2) + -- + -- Get/Set_Suspend_State_Index (Field3) + -- + -- Get/Set_Suspend_State_Chain (Field4) + ---------------- -- operators -- ---------------- @@ -4998,6 +5035,7 @@ package Vhdl.Nodes is Iir_Kind_Interface_Procedure_Declaration, -- interface Iir_Kind_Signal_Attribute_Declaration, + Iir_Kind_Suspend_State_Declaration, -- Expressions. Iir_Kind_Identity_Operator, @@ -5117,6 +5155,7 @@ package Vhdl.Nodes is Iir_Kind_Procedure_Call_Statement, Iir_Kind_Break_Statement, Iir_Kind_If_Statement, + Iir_Kind_Suspend_State_Statement, Iir_Kind_Elsif, -- Names @@ -5291,11 +5330,6 @@ package Vhdl.Nodes is Iir_Predefined_Enum_Greater, Iir_Predefined_Enum_Greater_Equal, - -- LRM08 5.2.6 Predefined operations on scalar types. - Iir_Predefined_Enum_Minimum, - Iir_Predefined_Enum_Maximum, - Iir_Predefined_Enum_To_String, - -- Predefined operators for BIT type. -- LRM08 9.2.2 Logical Operators @@ -5318,10 +5352,6 @@ package Vhdl.Nodes is -- LRM08 9.2.9 Condition operator Iir_Predefined_Bit_Condition, - -- LRM08 5.2.6 Predefined operations on scalar types. - Iir_Predefined_Bit_Rising_Edge, - Iir_Predefined_Bit_Falling_Edge, - -- Predefined operators for any integer type. -- LRM08 9.2.3 Relational Operators @@ -5352,11 +5382,6 @@ package Vhdl.Nodes is -- LRM08 9.2.8 Miscellaneous operators Iir_Predefined_Integer_Exp, - -- LRM08 5.2.6 Predefined operations on scalar types. - Iir_Predefined_Integer_Minimum, - Iir_Predefined_Integer_Maximum, - Iir_Predefined_Integer_To_String, - -- Predefined operators for any floating type. -- LRM08 9.2.3 Relational Operators @@ -5385,13 +5410,6 @@ package Vhdl.Nodes is -- LRM08 9.2.8 Miscellaneous operators Iir_Predefined_Floating_Exp, - -- LRM08 5.2.6 Predefined operations on scalar types. - Iir_Predefined_Floating_Minimum, - Iir_Predefined_Floating_Maximum, - Iir_Predefined_Floating_To_String, - Iir_Predefined_Real_To_String_Digits, - Iir_Predefined_Real_To_String_Format, - -- Predefined operator for universal types. -- LRM08 9.2.7 Multiplying operators @@ -5431,12 +5449,6 @@ package Vhdl.Nodes is Iir_Predefined_Physical_Mod, Iir_Predefined_Physical_Rem, - -- LRM08 5.2.6 Predefined operations on scalar types. - Iir_Predefined_Physical_Minimum, - Iir_Predefined_Physical_Maximum, - Iir_Predefined_Physical_To_String, - Iir_Predefined_Time_To_String_Unit, - -- Predefined operators for access. -- LRM08 9.2.3 Relational Operators @@ -5519,11 +5531,6 @@ package Vhdl.Nodes is Iir_Predefined_Bit_Array_Match_Equality, Iir_Predefined_Bit_Array_Match_Inequality, - -- LRM08 5.3.2.4 Predefined operations on array types - Iir_Predefined_Array_Char_To_String, - Iir_Predefined_Bit_Vector_To_Ostring, - Iir_Predefined_Bit_Vector_To_Hstring, - -- LRM08 9.2.3 Relational Operators -- IEEE.Std_Logic_1164.Std_Ulogic Iir_Predefined_Std_Ulogic_Match_Equality, @@ -5537,6 +5544,38 @@ package Vhdl.Nodes is Iir_Predefined_Std_Ulogic_Array_Match_Equality, Iir_Predefined_Std_Ulogic_Array_Match_Inequality, + -- LRM08 5.2.6 Predefined operations on scalar types. + Iir_Predefined_Enum_Minimum, + Iir_Predefined_Enum_Maximum, + Iir_Predefined_Enum_To_String, + + -- LRM08 5.2.6 Predefined operations on scalar types. + Iir_Predefined_Integer_Minimum, + Iir_Predefined_Integer_Maximum, + Iir_Predefined_Integer_To_String, + + -- LRM08 5.2.6 Predefined operations on scalar types. + Iir_Predefined_Bit_Rising_Edge, + Iir_Predefined_Bit_Falling_Edge, + + -- LRM08 5.2.6 Predefined operations on scalar types. + Iir_Predefined_Floating_Minimum, + Iir_Predefined_Floating_Maximum, + Iir_Predefined_Floating_To_String, + Iir_Predefined_Real_To_String_Digits, + Iir_Predefined_Real_To_String_Format, + + -- LRM08 5.2.6 Predefined operations on scalar types. + Iir_Predefined_Physical_Minimum, + Iir_Predefined_Physical_Maximum, + Iir_Predefined_Physical_To_String, + Iir_Predefined_Time_To_String_Unit, + + -- LRM08 5.3.2.4 Predefined operations on array types + Iir_Predefined_Array_Char_To_String, + Iir_Predefined_Bit_Vector_To_Ostring, + Iir_Predefined_Bit_Vector_To_Hstring, + -- -- Predefined attribute functions. -- Iir_Predefined_Attribute_Image, -- Iir_Predefined_Attribute_Value, @@ -5584,6 +5623,13 @@ package Vhdl.Nodes is Iir_Predefined_Foreign_Textio_Read_Real, Iir_Predefined_Foreign_Textio_Write_Real, + -- Defined in package std.env + Iir_Predefined_Std_Env_Stop_Status, + Iir_Predefined_Std_Env_Stop, + Iir_Predefined_Std_Env_Finish_Status, + Iir_Predefined_Std_Env_Finish, + Iir_Predefined_Std_Env_Resolution_Limit, + -- Defined in package ieee.std_logic_1164 -- Std_Ulogic operations. @@ -5634,8 +5680,8 @@ package Vhdl.Nodes is Iir_Predefined_Ieee_1164_To_UX01_Bv_Suv, Iir_Predefined_Ieee_1164_To_UX01_Bit_Log, - Iir_Predefined_Ieee_1164_Vector_Is_X, - Iir_Predefined_Ieee_1164_Scalar_Is_X, + Iir_Predefined_Ieee_1164_Is_X_Slv, + Iir_Predefined_Ieee_1164_Is_X_Log, Iir_Predefined_Ieee_1164_Rising_Edge, Iir_Predefined_Ieee_1164_Falling_Edge, @@ -5669,6 +5715,12 @@ package Vhdl.Nodes is Iir_Predefined_Ieee_1164_Condition_Operator, + Iir_Predefined_Ieee_1164_To_01_Log_Log, + Iir_Predefined_Ieee_1164_To_01_Slv_Log, + + Iir_Predefined_Ieee_1164_To_Hstring, + Iir_Predefined_Ieee_1164_To_Ostring, + -- Numeric_Std. -- Abbreviations: -- Uns: Unsigned, Sgn: Signed, Nat: Natural, Int: Integer. @@ -5835,22 +5887,46 @@ package Vhdl.Nodes is Iir_Predefined_Ieee_Numeric_Std_Ror_Sgn_Int, Iir_Predefined_Ieee_Numeric_Std_And_Uns_Uns, + Iir_Predefined_Ieee_Numeric_Std_And_Uns_Log, + Iir_Predefined_Ieee_Numeric_Std_And_Log_Uns, Iir_Predefined_Ieee_Numeric_Std_And_Sgn_Sgn, - - Iir_Predefined_Ieee_Numeric_Std_Or_Uns_Uns, - Iir_Predefined_Ieee_Numeric_Std_Or_Sgn_Sgn, + Iir_Predefined_Ieee_Numeric_Std_And_Sgn_Log, + Iir_Predefined_Ieee_Numeric_Std_And_Log_Sgn, Iir_Predefined_Ieee_Numeric_Std_Nand_Uns_Uns, + Iir_Predefined_Ieee_Numeric_Std_Nand_Uns_Log, + Iir_Predefined_Ieee_Numeric_Std_Nand_Log_Uns, Iir_Predefined_Ieee_Numeric_Std_Nand_Sgn_Sgn, + Iir_Predefined_Ieee_Numeric_Std_Nand_Sgn_Log, + Iir_Predefined_Ieee_Numeric_Std_Nand_Log_Sgn, + + Iir_Predefined_Ieee_Numeric_Std_Or_Uns_Uns, + Iir_Predefined_Ieee_Numeric_Std_Or_Uns_Log, + Iir_Predefined_Ieee_Numeric_Std_Or_Log_Uns, + Iir_Predefined_Ieee_Numeric_Std_Or_Sgn_Sgn, + Iir_Predefined_Ieee_Numeric_Std_Or_Sgn_Log, + Iir_Predefined_Ieee_Numeric_Std_Or_Log_Sgn, Iir_Predefined_Ieee_Numeric_Std_Nor_Uns_Uns, + Iir_Predefined_Ieee_Numeric_Std_Nor_Uns_Log, + Iir_Predefined_Ieee_Numeric_Std_Nor_Log_Uns, Iir_Predefined_Ieee_Numeric_Std_Nor_Sgn_Sgn, + Iir_Predefined_Ieee_Numeric_Std_Nor_Sgn_Log, + Iir_Predefined_Ieee_Numeric_Std_Nor_Log_Sgn, Iir_Predefined_Ieee_Numeric_Std_Xor_Uns_Uns, + Iir_Predefined_Ieee_Numeric_Std_Xor_Uns_Log, + Iir_Predefined_Ieee_Numeric_Std_Xor_Log_Uns, Iir_Predefined_Ieee_Numeric_Std_Xor_Sgn_Sgn, + Iir_Predefined_Ieee_Numeric_Std_Xor_Sgn_Log, + Iir_Predefined_Ieee_Numeric_Std_Xor_Log_Sgn, Iir_Predefined_Ieee_Numeric_Std_Xnor_Uns_Uns, + Iir_Predefined_Ieee_Numeric_Std_Xnor_Uns_Log, + Iir_Predefined_Ieee_Numeric_Std_Xnor_Log_Uns, Iir_Predefined_Ieee_Numeric_Std_Xnor_Sgn_Sgn, + Iir_Predefined_Ieee_Numeric_Std_Xnor_Sgn_Log, + Iir_Predefined_Ieee_Numeric_Std_Xnor_Log_Sgn, -- Numeric_Std binary operators (end) -- Unary functions for numeric_std @@ -5918,19 +5994,97 @@ package Vhdl.Nodes is Iir_Predefined_Ieee_Numeric_Std_To_01_Uns, Iir_Predefined_Ieee_Numeric_Std_To_01_Sgn, + Iir_Predefined_Ieee_Numeric_Std_To_X01_Uns, + Iir_Predefined_Ieee_Numeric_Std_To_X01_Sgn, + + Iir_Predefined_Ieee_Numeric_Std_To_X01Z_Uns, + Iir_Predefined_Ieee_Numeric_Std_To_X01Z_Sgn, + + Iir_Predefined_Ieee_Numeric_Std_To_UX01_Uns, + Iir_Predefined_Ieee_Numeric_Std_To_UX01_Sgn, + + Iir_Predefined_Ieee_Numeric_Std_Is_X_Uns, + Iir_Predefined_Ieee_Numeric_Std_Is_X_Sgn, + + Iir_Predefined_Ieee_Numeric_Std_To_Hstring_Uns, + Iir_Predefined_Ieee_Numeric_Std_To_Ostring_Uns, + + Iir_Predefined_Ieee_Numeric_Std_To_Hstring_Sgn, + Iir_Predefined_Ieee_Numeric_Std_To_Ostring_Sgn, + + -- numeric_bit + + -- To_Integer, To_Unsigned, to_Signed + Iir_Predefined_Ieee_Numeric_Bit_Toint_Uns_Nat, + Iir_Predefined_Ieee_Numeric_Bit_Toint_Sgn_Int, + Iir_Predefined_Ieee_Numeric_Bit_Touns_Nat_Nat_Uns, + Iir_Predefined_Ieee_Numeric_Bit_Touns_Nat_Uns_Uns, + Iir_Predefined_Ieee_Numeric_Bit_Tosgn_Int_Nat_Sgn, + Iir_Predefined_Ieee_Numeric_Bit_Tosgn_Int_Sgn_Sgn, + -- Numeric_Std_Unsigned (ieee2008) + Iir_Predefined_Ieee_Numeric_Std_Unsigned_Add_Slv_Slv, + Iir_Predefined_Ieee_Numeric_Std_Unsigned_Add_Slv_Nat, + Iir_Predefined_Ieee_Numeric_Std_Unsigned_Add_Nat_Slv, + + Iir_Predefined_Ieee_Numeric_Std_Unsigned_Sub_Slv_Slv, + Iir_Predefined_Ieee_Numeric_Std_Unsigned_Sub_Slv_Nat, + Iir_Predefined_Ieee_Numeric_Std_Unsigned_Sub_Nat_Slv, + + Iir_Predefined_Ieee_Numeric_Std_Unsigned_Find_Rightmost, + Iir_Predefined_Ieee_Numeric_Std_Unsigned_Find_Leftmost, + + Iir_Predefined_Ieee_Numeric_Std_Unsigned_Shift_Left, + Iir_Predefined_Ieee_Numeric_Std_Unsigned_Shift_Right, + + Iir_Predefined_Ieee_Numeric_Std_Unsigned_Rotate_Left, + Iir_Predefined_Ieee_Numeric_Std_Unsigned_Rotate_Right, + Iir_Predefined_Ieee_Numeric_Std_Unsigned_To_Integer_Slv_Nat, - Iir_Predefined_Ieee_Numeric_Std_Unsigned_To_Slv_Nat_Nat_Slv, + + Iir_Predefined_Ieee_Numeric_Std_Unsigned_To_Slv_Nat_Nat, + Iir_Predefined_Ieee_Numeric_Std_Unsigned_To_Slv_Nat_Slv, + + Iir_Predefined_Ieee_Numeric_Std_Unsigned_To_Suv_Nat_Nat, + Iir_Predefined_Ieee_Numeric_Std_Unsigned_To_Suv_Nat_Suv, + + Iir_Predefined_Ieee_Numeric_Std_Unsigned_Resize_Slv_Nat, + Iir_Predefined_Ieee_Numeric_Std_Unsigned_Resize_Slv_Slv, + + Iir_Predefined_Ieee_Numeric_Std_Unsigned_Maximum_Slv_Slv, + Iir_Predefined_Ieee_Numeric_Std_Unsigned_Minimum_Slv_Slv, -- Math_Real + Iir_Predefined_Ieee_Math_Real_Sign, Iir_Predefined_Ieee_Math_Real_Ceil, Iir_Predefined_Ieee_Math_Real_Floor, Iir_Predefined_Ieee_Math_Real_Round, + Iir_Predefined_Ieee_Math_Real_Trunc, + Iir_Predefined_Ieee_Math_Real_Mod, + Iir_Predefined_Ieee_Math_Real_Realmax, + Iir_Predefined_Ieee_Math_Real_Realmin, + Iir_Predefined_Ieee_Math_Real_Sqrt, + Iir_Predefined_Ieee_Math_Real_Cbrt, + Iir_Predefined_Ieee_Math_Real_Pow_Int_Real, + Iir_Predefined_Ieee_Math_Real_Pow_Real_Real, + Iir_Predefined_Ieee_Math_Real_Exp, + Iir_Predefined_Ieee_Math_Real_Log, Iir_Predefined_Ieee_Math_Real_Log2, + Iir_Predefined_Ieee_Math_Real_Log10, + Iir_Predefined_Ieee_Math_Real_Log_Real_Real, Iir_Predefined_Ieee_Math_Real_Sin, Iir_Predefined_Ieee_Math_Real_Cos, + Iir_Predefined_Ieee_Math_Real_Tan, + Iir_Predefined_Ieee_Math_Real_Arcsin, + Iir_Predefined_Ieee_Math_Real_Arccos, Iir_Predefined_Ieee_Math_Real_Arctan, - Iir_Predefined_Ieee_Math_Real_Pow, + Iir_Predefined_Ieee_Math_Real_Arctan_Real_Real, + Iir_Predefined_Ieee_Math_Real_Sinh, + Iir_Predefined_Ieee_Math_Real_Cosh, + Iir_Predefined_Ieee_Math_Real_Tanh, + Iir_Predefined_Ieee_Math_Real_Arcsinh, + Iir_Predefined_Ieee_Math_Real_Arccosh, + Iir_Predefined_Ieee_Math_Real_Arctanh, -- Std_Logic_Unsigned (synopsys extension). Iir_Predefined_Ieee_Std_Logic_Unsigned_Add_Slv_Slv, @@ -6199,6 +6353,9 @@ package Vhdl.Nodes is subtype Iir_Predefined_Pure_Functions is Iir_Predefined_Functions range Iir_Predefined_Boolean_And .. Iir_Predefined_Functions'Pred (Iir_Predefined_Deallocate); + subtype Iir_Predefined_Operators is Iir_Predefined_Functions range + Iir_Predefined_Boolean_And .. + Iir_Predefined_Std_Ulogic_Array_Match_Inequality; subtype Iir_Predefined_Impure_Functions is Iir_Predefined_Functions range Iir_Predefined_Deallocate .. Iir_Predefined_Functions'Pred (Iir_Predefined_None); @@ -6265,6 +6422,11 @@ package Vhdl.Nodes is Iir_Predefined_Ieee_Numeric_Std_Add_Uns_Uns .. Iir_Predefined_Ieee_Numeric_Std_Xnor_Sgn_Sgn; + subtype Iir_Predefined_Ieee_Numeric_Std_Unsigned_Operators + is Iir_Predefined_Functions range + Iir_Predefined_Ieee_Numeric_Std_Unsigned_Add_Slv_Slv .. + Iir_Predefined_Ieee_Numeric_Std_Unsigned_Sub_Nat_Slv; + -- Size of scalar types. -- Their size is determined during analysis (using the range), so that -- all backends have the same view. @@ -6970,6 +7132,30 @@ package Vhdl.Nodes is --Iir_Kind_Break_Statement Iir_Kind_If_Statement; + -- All sequential statements + suspend_state_statement. + subtype Iir_Kinds_Sequential_Statement_Ext is Iir_Kind range + Iir_Kind_Simple_Signal_Assignment_Statement .. + --Iir_Kind_Conditional_Signal_Assignment_Statement + --Iir_Kind_Selected_Waveform_Assignment_Statement + --Iir_Kind_Signal_Force_Assignment_Statement + --Iir_Kind_Signal_Release_Assignment_Statement + --Iir_Kind_Null_Statement + --Iir_Kind_Assertion_Statement + --Iir_Kind_Report_Statement + --Iir_Kind_Wait_Statement + --Iir_Kind_Variable_Assignment_Statement + --Iir_Kind_Conditional_Variable_Assignment_Statement + --Iir_Kind_Return_Statement + --Iir_Kind_For_Loop_Statement + --Iir_Kind_While_Loop_Statement + --Iir_Kind_Next_Statement + --Iir_Kind_Exit_Statement + --Iir_Kind_Case_Statement + --Iir_Kind_Procedure_Call_Statement + --Iir_Kind_Break_Statement + --Iir_Kind_If_Statement + Iir_Kind_Suspend_State_Statement; + subtype Iir_Kinds_Next_Exit_Statement is Iir_Kind range Iir_Kind_Next_Statement .. Iir_Kind_Exit_Statement; @@ -8908,6 +9094,11 @@ package Vhdl.Nodes is function Get_In_Formal_Flag (Name : Iir) return Boolean; procedure Set_In_Formal_Flag (Name : Iir; Flag : Boolean); + -- True iff the association is an internal association. + -- Field: Flag5 + function Get_Inertial_Flag (Name : Iir) return Boolean; + procedure Set_Inertial_Flag (Name : Iir; Flag : Boolean); + -- The subtype of a slice. Contrary to the Type field, this is not a -- reference. -- Field: Field3 @@ -9326,4 +9517,12 @@ package Vhdl.Nodes is -- Field: Field1 (uc) function Get_Foreign_Node (N : Iir) return Int32; procedure Set_Foreign_Node (N : Iir; En : Int32); + + -- Field: Field3 (uc) + function Get_Suspend_State_Index (N : Iir) return Int32; + procedure Set_Suspend_State_Index (N : Iir; Num : Int32); + + -- Field: Field4 Forward_Ref + function Get_Suspend_State_Chain (N : Iir) return Iir; + procedure Set_Suspend_State_Chain (N : Iir; Chain : Iir); end Vhdl.Nodes; |