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Diffstat (limited to 'src/vhdl/vhdl-nodes.ads')
| -rw-r--r-- | src/vhdl/vhdl-nodes.ads | 13 |
1 files changed, 13 insertions, 0 deletions
diff --git a/src/vhdl/vhdl-nodes.ads b/src/vhdl/vhdl-nodes.ads index f903a4c4d..44d25880d 100644 --- a/src/vhdl/vhdl-nodes.ads +++ b/src/vhdl/vhdl-nodes.ads @@ -5093,6 +5093,19 @@ package Vhdl.Nodes is Iir_Predefined_Ieee_Std_Logic_Unsigned_Ne_Slv_Int, Iir_Predefined_Ieee_Std_Logic_Unsigned_Ne_Int_Slv, + -- Std_Logic_Signed (synopsys extension). + Iir_Predefined_Ieee_Std_Logic_Signed_Add_Slv_Slv, + Iir_Predefined_Ieee_Std_Logic_Signed_Add_Slv_Int, + Iir_Predefined_Ieee_Std_Logic_Signed_Add_Int_Slv, + Iir_Predefined_Ieee_Std_Logic_Signed_Add_Slv_Sl, + Iir_Predefined_Ieee_Std_Logic_Signed_Add_Sl_Slv, + + Iir_Predefined_Ieee_Std_Logic_Signed_Sub_Slv_Slv, + Iir_Predefined_Ieee_Std_Logic_Signed_Sub_Slv_Int, + Iir_Predefined_Ieee_Std_Logic_Signed_Sub_Int_Slv, + Iir_Predefined_Ieee_Std_Logic_Signed_Sub_Slv_Sl, + Iir_Predefined_Ieee_Std_Logic_Signed_Sub_Sl_Slv, + -- std_logic_arith (synopsys extention). Iir_Predefined_Ieee_Std_Logic_Arith_Conv_Unsigned_Int, Iir_Predefined_Ieee_Std_Logic_Arith_Conv_Unsigned_Uns, |