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-rw-r--r--src/vhdl/vhdl-nodes.ads34
1 files changed, 4 insertions, 30 deletions
diff --git a/src/vhdl/vhdl-nodes.ads b/src/vhdl/vhdl-nodes.ads
index 58dce712a..c905d94ae 100644
--- a/src/vhdl/vhdl-nodes.ads
+++ b/src/vhdl/vhdl-nodes.ads
@@ -2905,16 +2905,16 @@ package Vhdl.Nodes is
-- Iir_Kind_Psl_Assert_Directive (Medium)
-- Iir_Kind_Psl_Assume_Directive (Medium)
-- Iir_Kind_Psl_Cover_Directive (Medium)
+ -- Iir_Kind_Psl_Restrict_Directive (Medium)
--
-- Get/Set_Parent (Field0)
--
-- Only for Iir_Kind_Psl_Assert_Directive:
- -- Get/Set_Psl_Property (Field1)
- --
-- Only for Iir_Kind_Psl_Assume_Directive:
-- Get/Set_Psl_Property (Field1)
--
-- Only for Iir_Kind_Psl_Cover_Directive:
+ -- Only for Iir_Kind_Psl_Restrict_Directive:
-- Get/Set_Psl_Sequence (Field1)
--
-- Get/Set_Chain (Field2)
@@ -2922,8 +2922,10 @@ package Vhdl.Nodes is
-- Get/Set_Label (Field3)
-- Get/Set_Identifier (Alias Field3)
--
+ -- Only for Iir_Kind_Psl_Assert_Directive:
-- Get/Set_Severity_Expression (Field4)
--
+ -- Only for Iir_Kind_Psl_Assert_Directive:
-- Get/Set_Report_Expression (Field5)
--
-- The following fields are set by canon.
@@ -2943,34 +2945,6 @@ package Vhdl.Nodes is
--
-- Get/Set_Visible_Flag (Flag4)
- -- Iir_Kind_Psl_Restrict_Directive (Medium)
- --
- -- Get/Set_Parent (Field0)
- --
- -- Get/Set_Psl_Sequence (Field1)
- --
- -- Get/Set_Chain (Field2)
- --
- -- Get/Set_Label (Field3)
- -- Get/Set_Identifier (Alias Field3)
- --
- -- The following fields are set by canon.
- -- Get/Set_PSL_Clock (Field7)
- --
- -- Get/Set_PSL_NFA (Field8)
- --
- -- Number of states in the NFA.
- -- Get/Set_PSL_Nbr_States (Field9)
- --
- -- Get/Set_PSL_Clock_Sensitivity (Field10)
- --
- -- True if at least one of the NFA edge has the EOS flag.
- -- Get/Set_PSL_EOS_Flag (Flag1)
- --
- -- Get/Set_Postponed_Flag (Flag3)
- --
- -- Get/Set_Visible_Flag (Flag4)
-
-- Iir_Kind_Component_Instantiation_Statement (Medium)
--
-- LRM08 11.7 Component instantiation statements