diff options
Diffstat (limited to 'src')
| -rw-r--r-- | src/std_names.adb | 2 | ||||
| -rw-r--r-- | src/std_names.ads | 8 | ||||
| -rw-r--r-- | src/vhdl/vhdl-ieee-numeric.adb | 12 | ||||
| -rw-r--r-- | src/vhdl/vhdl-nodes.ads | 5 |
4 files changed, 24 insertions, 3 deletions
diff --git a/src/std_names.adb b/src/std_names.adb index 7552a4097..9df07bb6d 100644 --- a/src/std_names.adb +++ b/src/std_names.adb @@ -644,6 +644,8 @@ package body Std_Names is Def ("std_match", Name_Std_Match); Def ("shift_left", Name_Shift_Left); Def ("shift_right", Name_Shift_Right); + Def ("rotate_left", Name_Rotate_Left); + Def ("rotate_right", Name_Rotate_Right); Def ("math_real", Name_Math_Real); Def ("ceil", Name_Ceil); Def ("log2", Name_Log2); diff --git a/src/std_names.ads b/src/std_names.ads index 3af9e6082..da13ace61 100644 --- a/src/std_names.ads +++ b/src/std_names.ads @@ -725,9 +725,11 @@ package Std_Names is Name_Std_Match : constant Name_Id := Name_First_Ieee + 023; Name_Shift_Left : constant Name_Id := Name_First_Ieee + 024; Name_Shift_Right : constant Name_Id := Name_First_Ieee + 025; - Name_Math_Real : constant Name_Id := Name_First_Ieee + 026; - Name_Ceil : constant Name_Id := Name_First_Ieee + 027; - Name_Log2 : constant Name_Id := Name_First_Ieee + 028; + Name_Rotate_Left : constant Name_Id := Name_First_Ieee + 026; + Name_Rotate_Right : constant Name_Id := Name_First_Ieee + 027; + Name_Math_Real : constant Name_Id := Name_First_Ieee + 028; + Name_Ceil : constant Name_Id := Name_First_Ieee + 029; + Name_Log2 : constant Name_Id := Name_First_Ieee + 030; Name_Last_Ieee : constant Name_Id := Name_Log2; -- Verilog Directives. diff --git a/src/vhdl/vhdl-ieee-numeric.adb b/src/vhdl/vhdl-ieee-numeric.adb index e0876b2ad..c7b53a38b 100644 --- a/src/vhdl/vhdl-ieee-numeric.adb +++ b/src/vhdl/vhdl-ieee-numeric.adb @@ -296,6 +296,14 @@ package body Vhdl.Ieee.Numeric is (Type_Signed => Iir_Predefined_Ieee_Numeric_Std_Shr_Sgn_Nat, Type_Unsigned => Iir_Predefined_Ieee_Numeric_Std_Shr_Uns_Nat); + Rol_Patterns : constant Shift_Pattern_Type := + (Type_Signed => Iir_Predefined_Ieee_Numeric_Std_Rol_Sgn_Nat, + Type_Unsigned => Iir_Predefined_Ieee_Numeric_Std_Rol_Uns_Nat); + + Ror_Patterns : constant Shift_Pattern_Type := + (Type_Signed => Iir_Predefined_Ieee_Numeric_Std_Ror_Sgn_Nat, + Type_Unsigned => Iir_Predefined_Ieee_Numeric_Std_Ror_Uns_Nat); + Error : exception; procedure Extract_Declarations (Pkg_Decl : Iir_Package_Declaration; @@ -622,6 +630,10 @@ package body Vhdl.Ieee.Numeric is Handle_Shift (Shl_Patterns); when Name_Shift_Right => Handle_Shift (Shr_Patterns); + when Name_Rotate_Left => + Handle_Shift (Rol_Patterns); + when Name_Rotate_Right => + Handle_Shift (Ror_Patterns); when others => null; end case; diff --git a/src/vhdl/vhdl-nodes.ads b/src/vhdl/vhdl-nodes.ads index 53c3ba053..27ec94448 100644 --- a/src/vhdl/vhdl-nodes.ads +++ b/src/vhdl/vhdl-nodes.ads @@ -5005,6 +5005,11 @@ package Vhdl.Nodes is Iir_Predefined_Ieee_Numeric_Std_Shl_Sgn_Nat, Iir_Predefined_Ieee_Numeric_Std_Shr_Sgn_Nat, + Iir_Predefined_Ieee_Numeric_Std_Rol_Uns_Nat, + Iir_Predefined_Ieee_Numeric_Std_Ror_Uns_Nat, + Iir_Predefined_Ieee_Numeric_Std_Rol_Sgn_Nat, + Iir_Predefined_Ieee_Numeric_Std_Ror_Sgn_Nat, + Iir_Predefined_Ieee_Numeric_Std_Not_Uns, Iir_Predefined_Ieee_Numeric_Std_Not_Sgn, |