1 files changed, 33 insertions, 0 deletions
diff --git a/testsuite/gna/issue1708/ex1.vhdl b/testsuite/gna/issue1708/ex1.vhdl
new file mode 100644
index 000000000..1b7dd854b
--- /dev/null
+++ b/testsuite/gna/issue1708/ex1.vhdl
@@ -0,0 +1,33 @@
+Library ieee;
+use ieee.std_logic_1164.all;
+
+entity ex1 is
+end entity;
+
+
+architecture tb of ex1 is
+
+    signal a,b : std_logic := '0';
+    signal clk_sys : std_logic;
+
+    default clock is rising_edge(clk_sys);
+begin
+
+    gen_clock_proc : process
+    begin
+    	clk_sys <= '1';
+        wait for 5 ns;
+        clk_sys <= '0';
+        wait for 5 ns;
+    end process;
+
+    test_proc : process
+    begin
+          a <= '1';
+          wait for 50 ns;
+          std.env.finish;
+    end process;
+
+    my_seq : assert never a[=3];
+
+end architecture tb;