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Diffstat (limited to 'testsuite/gna/issue2116/aspect01.vhdl')
-rw-r--r-- | testsuite/gna/issue2116/aspect01.vhdl | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/testsuite/gna/issue2116/aspect01.vhdl b/testsuite/gna/issue2116/aspect01.vhdl new file mode 100644 index 000000000..a2005b2e3 --- /dev/null +++ b/testsuite/gna/issue2116/aspect01.vhdl @@ -0,0 +1,6 @@ +library ieee;use ieee.std_logic_1164.all;entity dut is +port(sig_i:std_logic_vector;sig_o:out std_logic_vector);end entity;architecture a of dut is +begin sig_o<=sig_i;end architecture;library ieee;use ieee.std_logic_1164.all;entity tb is +end entity;architecture h of tb is +signal s:std_logic_vector(0 to 0);signal s0:std_logic_vector(0 downto 0);begin process begin +wait for ns;report to_string(0);report to_string(0);end process;t:entity k't port map(0);end architecture; |