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Diffstat (limited to 'testsuite/gna/issue72/fixed.vhdl')
| -rw-r--r-- | testsuite/gna/issue72/fixed.vhdl | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/testsuite/gna/issue72/fixed.vhdl b/testsuite/gna/issue72/fixed.vhdl index 214c6049a..8b13577ff 100644 --- a/testsuite/gna/issue72/fixed.vhdl +++ b/testsuite/gna/issue72/fixed.vhdl @@ -22,7 +22,7 @@ begin -- architecture rtl process (clk) is begin -- process if clk'event and clk = '1' then -- rising clock edge - if input = one then + if input = work.issue_pkg.one then output <= '1'; else output <= '0'; |