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-rw-r--r--testsuite/pyunit/dom/Expressions.py2
-rw-r--r--testsuite/pyunit/dom/Literals.py5
-rw-r--r--testsuite/pyunit/dom/StopWatch.py73
-rw-r--r--testsuite/pyunit/dom/examples/StopWatch/Debouncer.vhdl2
-rw-r--r--testsuite/pyunit/dom/examples/StopWatch/StopWatch.pkg.vhdl17
-rw-r--r--testsuite/pyunit/dom/examples/StopWatch/StopWatch.vhdl6
-rw-r--r--testsuite/pyunit/dom/examples/StopWatch/seg7_Display.vhdl2
-rw-r--r--testsuite/pyunit/dom/examples/StopWatch/toplevel.StopWatch.vhdl2
8 files changed, 90 insertions, 19 deletions
diff --git a/testsuite/pyunit/dom/Expressions.py b/testsuite/pyunit/dom/Expressions.py
index 4b2e47507..fe9bf22eb 100644
--- a/testsuite/pyunit/dom/Expressions.py
+++ b/testsuite/pyunit/dom/Expressions.py
@@ -97,7 +97,7 @@ class Expressions(TestCase):
# Start checks
self.assertIsInstance(default, InverseExpression)
self.assertIsInstance(default.Operand, SimpleObjectOrFunctionCallSymbol)
- self.assertEqual("true", str(default.Operand.SymbolName))
+ self.assertEqual("true", str(default.Operand)) # .SymbolName)) # XXX: hacked
# def test_AbsExpression(self):
# filename: Path = self._root / "{className}_{funcName}.vhdl".format(
diff --git a/testsuite/pyunit/dom/Literals.py b/testsuite/pyunit/dom/Literals.py
index 9f53a6cc6..8d0b72fb0 100644
--- a/testsuite/pyunit/dom/Literals.py
+++ b/testsuite/pyunit/dom/Literals.py
@@ -35,13 +35,12 @@ from textwrap import dedent
from typing import TypeVar, Dict
from unittest import TestCase
-from pyVHDLModel.SyntaxModel import ExpressionUnion
-
-from pyGHDL.dom.DesignUnit import Package
+from pyVHDLModel.Base import ExpressionUnion
from pyGHDL.dom.NonStandard import Design, Document
from pyGHDL.dom.Object import Constant
from pyGHDL.dom.Literal import IntegerLiteral
+from pyGHDL.dom.DesignUnit import Package
if __name__ == "__main__":
diff --git a/testsuite/pyunit/dom/StopWatch.py b/testsuite/pyunit/dom/StopWatch.py
index 6301eb1df..deab50a9f 100644
--- a/testsuite/pyunit/dom/StopWatch.py
+++ b/testsuite/pyunit/dom/StopWatch.py
@@ -30,11 +30,20 @@
#
# SPDX-License-Identifier: GPL-2.0-or-later
# ============================================================================
+from time import perf_counter_ns as time_perf_counter
from pathlib import Path
+from textwrap import dedent
+from typing import Dict, List
from unittest import TestCase
+from pyTooling.Graph import Vertex
+
+import pyVHDLModel
+import pyVHDLModel.DesignUnit
from pyGHDL.dom.NonStandard import Design, Document
+from pyGHDL.dom.formatting.GraphML import DependencyGraphFormatter, HierarchyGraphFormatter, CompileOrderGraphFormatter
from pyGHDL.dom.formatting.prettyprint import PrettyPrint
+from pyVHDLModel import DependencyGraphVertexKind, DependencyGraphEdgeKind, Library
if __name__ == "__main__":
print("ERROR: you called a testcase declaration file as an executable module.")
@@ -106,19 +115,65 @@ class Display(Designs):
class CompileOrder(Designs):
def test_Encoder(self):
+ print()
design = Design()
- design.LoadStdLibrary()
- design.LoadIEEELibrary()
- for lib, file in self._encoderFiles:
+ design.LoadDefaultLibraries()
+ t1 = time_perf_counter()
+ for lib, file in self._stopwatchFiles:
library = design.GetLibrary(lib)
document = Document(self._sourceDirectory / file)
design.AddDocument(document, library)
+ print(dedent("""\
+ file: {}
+ libghdl processing time: {:5.3f} us
+ DOM translation time: {:5.3f} us
+ """
+ ).format(
+ document.Path,
+ document.LibGHDLProcessingTime * 10**6,
+ document.DOMTranslationTime * 10**6,
+ )
+ )
+ pyGHDLTime = time_perf_counter() - t1
design.Analyze()
- PP = PrettyPrint()
- buffer = []
- buffer.append("Design:")
- for line in PP.formatDesign(design, 1):
- buffer.append(line)
- print("\n".join(buffer))
+ toplevel = [root.Value.Identifier for root in design.HierarchyGraph.IterateRoots()]
+
+ print(dedent("""
+ pyGHDL:
+ sum: {:5.3f} us
+ Analysis:
+ default library load time: {:5.3f} us
+ dependency analysis time: {:5.3f} us
+ Toplevel: {toplevel}
+ Compile order:\
+ """
+ ).format(
+ pyGHDLTime * 10**6,
+ design._loadDefaultLibraryTime * 10**6,
+ design._analyzeTime * 10**6,
+ toplevel=", ".join(toplevel)
+ )
+ )
+ for i, vertex in enumerate(design.IterateDocumentsInCompileOrder()):
+ print(f" {i:<2}: {vertex.Value.Path.relative_to(Path.cwd())}")
+
+ graphML = Path("dependencies.graphml")
+ dependencyFormatter = DependencyGraphFormatter(design.DependencyGraph)
+ dependencyFormatter.WriteGraphML(graphML)
+
+ graphML = Path("hierarchy.graphml")
+ hierarchyFormatter = HierarchyGraphFormatter(design.HierarchyGraph)
+ hierarchyFormatter.WriteGraphML(graphML)
+
+ graphML = Path("compileorder.graphml")
+ compileOrderFormatter = CompileOrderGraphFormatter(design.CompileOrderGraph)
+ compileOrderFormatter.WriteGraphML(graphML)
+
+ # PP = PrettyPrint()
+ # buffer = []
+ # buffer.append("Design:")
+ # for line in PP.formatDesign(design, 1):
+ # buffer.append(line)
+ # print("\n".join(buffer))
diff --git a/testsuite/pyunit/dom/examples/StopWatch/Debouncer.vhdl b/testsuite/pyunit/dom/examples/StopWatch/Debouncer.vhdl
index ef1474164..2c4a0130f 100644
--- a/testsuite/pyunit/dom/examples/StopWatch/Debouncer.vhdl
+++ b/testsuite/pyunit/dom/examples/StopWatch/Debouncer.vhdl
@@ -7,7 +7,7 @@ library IEEE;
use IEEE.std_logic_1164.all;
use IEEE.numeric_std.all;
-use work.Utilities_pkg.all;
+context work.Utilities_ctx;
entity Debouncer is
diff --git a/testsuite/pyunit/dom/examples/StopWatch/StopWatch.pkg.vhdl b/testsuite/pyunit/dom/examples/StopWatch/StopWatch.pkg.vhdl
index f67f99c72..3755e4575 100644
--- a/testsuite/pyunit/dom/examples/StopWatch/StopWatch.pkg.vhdl
+++ b/testsuite/pyunit/dom/examples/StopWatch/StopWatch.pkg.vhdl
@@ -30,4 +30,21 @@ package StopWatch_pkg is
Seg7Code : out std_logic_vector(7 downto 0)
);
end component;
+
+ component seg7_Display is
+ generic (
+ CLOCK_PERIOD : time := 10 ns;
+ REFRESH_RATE : time := 200 us;
+ DIGITS : positive
+ );
+ port (
+ Clock : in std_logic;
+
+ DigitValues : in T_BCD_Vector(DIGITS - 1 downto 0);
+ DotValues : in std_logic_vector(DIGITS - 1 downto 0) := (others => '0');
+
+ Seg7_Segments : out std_logic_vector(7 downto 0);
+ Seg7_Selects : out std_logic_vector(DIGITS - 1 downto 0)
+ );
+ end component;
end package;
diff --git a/testsuite/pyunit/dom/examples/StopWatch/StopWatch.vhdl b/testsuite/pyunit/dom/examples/StopWatch/StopWatch.vhdl
index 3d73fa0fa..87a147833 100644
--- a/testsuite/pyunit/dom/examples/StopWatch/StopWatch.vhdl
+++ b/testsuite/pyunit/dom/examples/StopWatch/StopWatch.vhdl
@@ -32,7 +32,7 @@ entity Stopwatch is
end entity;
-architecture trl of Stopwatch is
+architecture rtl of Stopwatch is
type T_STATE is (ST_RESET, ST_IDLE, ST_COUNTING, ST_PAUSE);
signal State : T_STATE := ST_IDLE;
@@ -92,7 +92,7 @@ begin
end case;
end process;
- TimeBaseCnt: entity work.Counter
+ TimeBaseCnt: entity lib_Utilities.Counter
generic map (
MODULO => TIMEBASE / (CLOCK_PERIOD * ite(IS_SIMULATION, 100, 1)),
BITS => 0
@@ -109,7 +109,7 @@ begin
Overflows(0) <= Tick;
genDigits: for i in CONFIG'range generate
- cnt: entity work.Counter
+ cnt: entity lib_Utilities.Counter
generic map (
MODULO => CONFIG(i).Modulo,
BITS => Digits(i)'length
diff --git a/testsuite/pyunit/dom/examples/StopWatch/seg7_Display.vhdl b/testsuite/pyunit/dom/examples/StopWatch/seg7_Display.vhdl
index da21075cf..6ed4ecaba 100644
--- a/testsuite/pyunit/dom/examples/StopWatch/seg7_Display.vhdl
+++ b/testsuite/pyunit/dom/examples/StopWatch/seg7_Display.vhdl
@@ -79,7 +79,7 @@ begin
Dot <= DotValues(to_index(Digit_Select, DotValues'high));
-- 7-segment encoder
- enc: configuration seg7_Encoder
+ enc: component seg7_Encoder
port map (
BCDValue => Digit,
Dot => Dot,
diff --git a/testsuite/pyunit/dom/examples/StopWatch/toplevel.StopWatch.vhdl b/testsuite/pyunit/dom/examples/StopWatch/toplevel.StopWatch.vhdl
index 08046e2cc..d23d75b2e 100644
--- a/testsuite/pyunit/dom/examples/StopWatch/toplevel.StopWatch.vhdl
+++ b/testsuite/pyunit/dom/examples/StopWatch/toplevel.StopWatch.vhdl
@@ -100,7 +100,7 @@ begin
);
-- 7-segment display
- display: configuration seg7_Display_cfg
+ display: /* configuration */ seg7_Display--_cfg
generic map (
CLOCK_PERIOD => CLOCK_PERIOD,
DIGITS => Digits'length
generated by cgit v1.2.3 (git 2.25.1) at 2025-04-05 22:08:07 +0000