1 files changed, 17 insertions, 0 deletions
diff --git a/testsuite/synth/issue1008/test_orig.vhdl b/testsuite/synth/issue1008/test_orig.vhdl
new file mode 100644
index 000000000..c568a0530
--- /dev/null
+++ b/testsuite/synth/issue1008/test_orig.vhdl
@@ -0,0 +1,17 @@
+library ieee;
+use ieee.std_logic_1164.all;
+use ieee.numeric_std.all;
+
+entity test is
+    port(
+         addr_in : in std_logic_vector(11 downto 0);
+         dat_out : out std_ulogic_vector(63 downto 0)
+         );
+end entity test;
+
+architecture behaviour of test is
+    type ram_t is array(0 to (4096 / 8) - 1) of std_logic_vector(63 downto 0);
+    signal memory : ram_t := (others => (others => '0'));
+begin
+    dat_out <= memory(to_integer(unsigned(addr_in(11 downto 3))));
+end architecture behaviour;