1 files changed, 13 insertions, 0 deletions
diff --git a/testsuite/synth/issue1540/ent1.vhdl b/testsuite/synth/issue1540/ent1.vhdl
new file mode 100644
index 000000000..254f6014f
--- /dev/null
+++ b/testsuite/synth/issue1540/ent1.vhdl
@@ -0,0 +1,13 @@
+library ieee;
+use ieee.std_logic_1164.all;
+
+entity ent1 is
+    port (
+        o: out bit
+    );
+end entity;
+
+architecture arch of ent1 is
+begin
+    o <= to_bit(std_ulogic' ('L'));
+end architecture;