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-rw-r--r--testsuite/synth/uassoc01/tb_uassoc01.vhdl23
1 files changed, 23 insertions, 0 deletions
diff --git a/testsuite/synth/uassoc01/tb_uassoc01.vhdl b/testsuite/synth/uassoc01/tb_uassoc01.vhdl
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index 000000000..1e34bf4cb
--- /dev/null
+++ b/testsuite/synth/uassoc01/tb_uassoc01.vhdl
@@ -0,0 +1,23 @@
+entity tb_uassoc01 is
+end tb_uassoc01;
+
+library ieee;
+use ieee.std_logic_1164.all;
+
+architecture behav of tb_uassoc01 is
+ signal i1 : std_logic_vector(3 downto 0);
+ signal i2 : std_logic_vector(7 downto 0);
+ signal o : std_logic_vector(3 downto 0);
+begin
+ dut: entity work.uassoc01
+ port map (i1, i2, o);
+
+ process
+ begin
+ i1 <= "1100";
+ i2 <= b"1010_1010";
+ wait for 1 ns;
+ assert o = "0110" severity failure;
+ wait;
+ end process;
+end behav;