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-rw-r--r--testsuite/gna/issue361/repro.vhdl14
-rwxr-xr-xtestsuite/gna/issue361/testsuite.sh11
2 files changed, 25 insertions, 0 deletions
diff --git a/testsuite/gna/issue361/repro.vhdl b/testsuite/gna/issue361/repro.vhdl
new file mode 100644
index 000000000..e994d8c0d
--- /dev/null
+++ b/testsuite/gna/issue361/repro.vhdl
@@ -0,0 +1,14 @@
+entity repro is
+end;
+
+architecture behav of repro is
+ type rec is record
+ v : bit_vector;
+ end record;
+
+ procedure assign (signal s : out rec; val : rec) is
+ begin
+ s <= val;
+ end assign;
+begin
+end behav;
diff --git a/testsuite/gna/issue361/testsuite.sh b/testsuite/gna/issue361/testsuite.sh
new file mode 100755
index 000000000..8d22a2073
--- /dev/null
+++ b/testsuite/gna/issue361/testsuite.sh
@@ -0,0 +1,11 @@
+#! /bin/sh
+
+. ../../testenv.sh
+
+export GHDL_STD_FLAGS=--std=08
+analyze repro.vhdl
+elab_simulate repro
+
+clean
+
+echo "Test successful"