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* netlists: change Loc parameter of synth_case.Tristan Gingold2019-10-275-6/+21
* synth: create build2_concat from netlists-concat.Tristan Gingold2019-10-277-38/+48
* netlists-butils: extract synth_case from synth.stmts.Tristan Gingold2019-10-263-149/+206
* testsuite/synth/psl02: renaming.Tristan Gingold2019-10-261-1/+1
* synth: handle concurrent signal assignment in vunits.Tristan Gingold2019-10-252-83/+91
* vhdl-canon: handle simple signal assignment in vunits.Tristan Gingold2019-10-251-273/+272
* vhdl-canon: extract canon_concurrent_label.Tristan Gingold2019-10-251-20/+25
* vhdl-annotations: extract annotate_concurrent_statement.Tristan Gingold2019-10-251-47/+53
* vhdl-annotations: minor renaming.Tristan Gingold2019-10-251-8/+8
* vhdl: extract sem_concurrent_statement, to handle hdl stmt in vunits.Tristan Gingold2019-10-254-119/+122
* vhdl-parse_psl: add comments.Tristan Gingold2019-10-251-8/+71
* Add testcase for previous commit.Tristan Gingold2019-10-242-0/+15
* vhdl-parse: do not scan PSL keywords in vunit declarations.Tristan Gingold2019-10-241-0/+4
* configure: fails if 'make' failed.Tristan Gingold2019-10-241-1/+4
* Add testcase for #984Tristan Gingold2019-10-246-0/+62
* vhdl/translate: elaborate dependencies of configurations. Fix #984Tristan Gingold2019-10-241-0/+4
* configure: fix typo (#994)1138-4EB2019-10-231-1/+1
* synth: add support for declarations in vunits.Tristan Gingold2019-10-232-4/+27
* vhdl-prints: do not crash on vunit declarations.Tristan Gingold2019-10-231-0/+4
* vhdl-annotations: handle some declarations in vunits.Tristan Gingold2019-10-231-0/+6
* vhdl-canon: handle some declarations in vunits.Tristan Gingold2019-10-231-2/+18
* vhdl-sem_psl: analyze some declarations.Tristan Gingold2019-10-231-0/+18
* vhdl-sem_decls: make sem_declaration public.Tristan Gingold2019-10-235-14/+31
* vhdl-sem_decls: extract sem_declaration.Tristan Gingold2019-10-231-121/+118
* netlists-dump: dump input net width.Tristan Gingold2019-10-231-0/+2
* change file permissions from read write to executable (#993)Arcturus2019-10-234-0/+0
* makefile: remove 'check' target (#992)1138-4EB2019-10-231-2/+0
* fix(configure): use '/dev/null' to check 'cmp', use 'sed' to compare versions...1138-4EB2019-10-231-3/+3
* vhdl-sem_decls: add comment.Tristan Gingold2019-10-211-0/+3
* vhdl-parse: parse declarations in vunit.Tristan Gingold2019-10-211-327/+352
* Regenerate ghdlsynth_gates.hTristan Gingold2019-10-211-0/+1
* vhdl: handle labels in verification units.Tristan Gingold2019-10-211-8/+62
* synth: generate cover for assertion precedent.Tristan Gingold2019-10-215-84/+103
* psl: add active state.Tristan Gingold2019-10-215-20/+78
* vhdl-prints: handle restrict in vunit.Tristan Gingold2019-10-211-0/+2
* psl-nfas-utils: reuse True_Node.Tristan Gingold2019-10-211-4/+2
* nelists-memories: reject memories with reset.Tristan Gingold2019-10-211-1/+4
* synth-stmts: set location of muxes on case statements.Tristan Gingold2019-10-211-6/+13
* synth: fixes for value_const.Tristan Gingold2019-10-202-0/+11
* Add testcase for #983Tristan Gingold2019-10-202-0/+53
* vhdl: try to convert identifier to token only for identifiersTristan Gingold2019-10-201-1/+3
* netlists-memories: fixes in ROM.Tristan Gingold2019-10-201-48/+51
* netlists-disp_vhdl: display memory initialization value.Tristan Gingold2019-10-201-2/+46
* synth: add value_const.Tristan Gingold2019-10-207-9/+69
* netlists-memories: preliminary work to handle ROM.Tristan Gingold2019-10-201-111/+194
* synth: add more locations.Tristan Gingold2019-10-202-0/+2
* netlists-dump: also dump instances location.Tristan Gingold2019-10-201-6/+34
* synth: use note messages for memories (instead of warnings).Tristan Gingold2019-10-194-28/+34
* ghdlsynth.h: add functions.Tristan Gingold2019-10-191-0/+4
* Regenerate ghdlsynth_gates.hTristan Gingold2019-10-181-0/+5