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* Files in the root not capitalized.1138-4EB2017-12-1011-894/+556
* Remove scrollbar in small screens1138-4EB2017-12-105-54/+25
* Add theme_overrrides.css1138-4EB2017-12-1019-491/+997
* README.md, index, WhatIsVHDL, WhatIsGHDL ready for review.1138-4EB2017-12-1014-487/+511
* Allow markdown1138-4EB2017-12-1018-1076/+998
* Update README.md with shield, pros/cons table...1138-4EB2017-12-102-59/+46
* Move split ols txts to doc/oldmds. Add shields to README. Change target of li...1138-4EB2017-12-1010-10/+28
* Remove <topic> from TODOs1138-4EB2017-12-106-26/+30
* Fix changelog1138-4EB2017-12-103-7/+8
* Add dots to TODOs1138-4EB2017-12-108-32/+10
* Removed numbers from folder names.1138-4EB2017-12-1026-28/+0
* File extensions must be rst, not rst.txt1138-4EB2017-12-108-9/+91
* Moving old content to new structure1138-4EB2017-12-1021-2715/+2952
* Moved introduction text.Patrick Lehmann2017-12-101-14/+12
* Added a YAML file to configure ReadTheDocs.Patrick Lehmann2017-12-101-0/+5
* Added Python (PIP) requirements file. Request Sphinx >= 1.5.2.Patrick Lehmann2017-12-102-1/+6
* Fixed used theme to allow local building.Patrick Lehmann2017-12-101-1/+1
* New documentation structure for GHDL.Patrick Lehmann2017-12-1040-25/+689
* Add testcase for #478Tristan Gingold2017-12-085-0/+62
* Avoid crash on string as prefix of procedure call.Tristan Gingold2017-12-081-1/+10
* simul-execution: fix creation of subprogram frame for shared generic packages.Tristan Gingold2017-12-081-29/+38
* simul-debugger: add debug_bt (internal debugging procedure).Tristan Gingold2017-12-081-0/+12
* evaluation: rename Get_Info to Get_Str_Info (reduce overloading).Tristan Gingold2017-12-083-8/+6
* simul: handle optional body for package instantiation.Tristan Gingold2017-12-071-2/+5
* bug040: reduce execution time for simulation.Tristan Gingold2017-12-071-1/+1
* simul: support --file-to-xmlTristan Gingold2017-12-071-0/+2
* simul: fix annotation of macro-expanded package instantiation.Tristan Gingold2017-12-071-5/+16
* simul: handle interface type.Tristan Gingold2017-12-072-3/+6
* simul: handle generic-mapped packages.Tristan Gingold2017-12-071-4/+11
* simul: handle nested package instantiation.Tristan Gingold2017-12-072-2/+5
* bug040: reduce simulation time for interpretation.Tristan Gingold2017-12-061-1/+5
* simul: fix execution of actual expression.Tristan Gingold2017-12-063-13/+40
* simul: remove Current_Component (unused).Tristan Gingold2017-12-062-11/+3
* simul: fix choice list for case generate statement.Tristan Gingold2017-12-051-2/+4
* simul: fix elaboration check for package.Tristan Gingold2017-12-051-1/+5
* simul: handle unconstrained case choice.Tristan Gingold2017-12-051-1/+17
* simul: psl default clock, unaffected waveform.Tristan Gingold2017-12-053-0/+8
* simul: handle interface subprogram.Tristan Gingold2017-12-053-11/+26
* simul: handle package interface, remove iir_value_environment.Tristan Gingold2017-12-059-80/+25
* simul: handle instantiated package.Tristan Gingold2017-12-054-11/+46
* simul: add support for case generate statetement.Tristan Gingold2017-12-044-14/+68
* simul: support nested packages.Tristan Gingold2017-12-042-58/+71
* simul: WIP for nested packages.Tristan Gingold2017-12-042-3/+7
* simul: add iir_value_instance, remove package_instances.Tristan Gingold2017-12-038-35/+81
* simul: Remove scope_type (unused).Tristan Gingold2017-12-034-186/+14
* simul: add global_info.Tristan Gingold2017-12-036-63/+77
* simul: refactoring: scope is now the corresponding sim_info.Tristan Gingold2017-12-038-112/+119
* python: generate more declarations.Tristan Gingold2017-12-012-2/+12
* Update .gitignore.Tristan Gingold2017-12-011-1/+4
* Testcase for #471Tristan Gingold2017-12-014-0/+39